Abstract: A memory such as for a high-speed microprocessor cache includes a first bank of bitcells and a second bank of bitcells. The banks are read from in a pipelined fashion with respect to cycles of a system clock signal such that a first read operation to the first bank is initiated with respect to a first cycle of the system clock signal whereas a second read operation to the second bank is initiated with respect to a second cycle of the system clock that is consecutive to the first clock cycle. A multiplexer selects between latched bits from the read operations responsive to cycles of the system clock signal.

Abstract: A memory such as for a high-speed microprocessor cache includes a first bank of bitcells and a second bank of bitcells. The banks are read from in a pipelined fashion with respect to cycles of a system clock signal such that a first read operation to the first bank is initiated with respect to a first cycle of the system clock signal whereas a second read operation to the second bank is initiated with respect to a second cycle of the system clock that is consecutive to the first clock cycle. A multiplexer selects between latched bits from the read operations responsive to cycles of the system clock signal.

Abstract: In some embodiments, disclosed is a wordline boosting technique using a self-timed capacitive charge boosting approach.

Abstract: In some embodiments, disclosed is a wordline boosting technique using a self-timed capacitive charge boosting approach.

Abstract: Various methods, computer-readable mediums, articles of manufacture and systems are disclosed. In one aspect, a method is provided that includes generating a packet with a first semiconductor chip. The packet is destined to transit a first substrate and be received by a node of a second semiconductor chip. The packet includes a packet header and packet body. The packet header includes an identification of a first exit point from the first substrate and an identification of the node. The packet is sent to the first substrate and eventually to the node of the second semiconductor chip.

Abstract: Various methods, computer-readable mediums, articles of manufacture and systems are disclosed. In one aspect, a method is provided that includes generating a packet with a first semiconductor chip. The packet is destined to transit a first substrate and be received by a node of a second semiconductor chip. The packet includes a packet header and packet body. The packet header includes an identification of a first exit point from the first substrate and an identification of the node. The packet is sent to the first substrate and eventually to the node of the second semiconductor chip.

Abstract: Generating in a computer system and deploying a data model of a plurality of database cluster configuration availability solutions over a computer network by creating a database cluster configuration modeling specification including objects contained in a unified model language diagram providing a definition of a database cluster configuration data model. Creating the database cluster configuration data model using the database cluster configuration modeling specification and upon receiving signals from a graphical user interface or from XML batch data files or from application programming interfaces, indicating the definition of the cluster configuration model.

Abstract: Generating a plurality of database cluster failover policy availability configuration modeling solutions by a database cluster management system in an environment of networked computer systems includes receiving a first signal from a user system specifying one of a plurality of database cluster failover policy type behavior patterns. The database cluster management system determines whether generating any of the failover policy type behavior patterns requires additional supplemental data. If no supplemental data are required, then the database cluster management system generates general database cluster policy solutions. If supplemental data are required, then the system utilizes an algorithm to generate unique, specific policy solutions by creating failover node sequences for each of the plurality of failover policy type behavior patterns requiring such additional supplemental data.

Abstract: Generating in a computer system and deploying a data model of a plurality of database cluster configuration availability solutions over a computer network by creating a database cluster configuration modeling specification including objects contained in a unified model language diagram providing a definition of a database cluster configuration data model. Creating the database cluster configuration data model using the database cluster configuration modeling specification and upon receiving signals from a graphical user interface or from XML batch data files or from application programming interfaces, indicating the definition of the cluster configuration model.