Patents by Inventor Subin Jin

Subin Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11756949
    Abstract: An integrated circuit includes at least one decoupling cell, wherein the at least one decoupling cell includes at least one P-type decoupling MOSFET and at least one N-type decoupling MOSFET, and a number of the at least one P-type decoupling MOSFET is different from a number of the at least one N-type decoupling MOSFET.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungwe Cho, Subin Jin
  • Patent number: 11355489
    Abstract: A semiconductor device includes a standard cell, which includes first to fourth active areas that are extended in a first direction, first to fourth gate lines that are extended in a second direction perpendicular to the first direction over the first to fourth active areas and are disposed parallel to each other, a first cutting layer that is disposed between the first active area and the second active area and separates the second and third gate lines, a second cutting layer that is disposed between the third active area and the fourth active area and separates the second and third gate lines, a first gate contact that is formed on the second gate line separated by the first cutting layer and the second cutting layer, and a second gate contact that is formed on the third gate line separated by the first cutting layer and the second cutting layer.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: June 7, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byounggon Kang, Subin Jin, Ha-Young Kim
  • Publication number: 20220102336
    Abstract: An integrated circuit includes at least one decoupling cell, wherein the at least one decoupling cell includes at least one P-type decoupling MOSFET and at least one N-type decoupling MOSFET, and a number of the at least one P-type decoupling MOSFET is different from a number of the at least one N-type decoupling MOSFET.
    Type: Application
    Filed: April 30, 2021
    Publication date: March 31, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungwe CHO, Subin JIN
  • Publication number: 20210210479
    Abstract: A semiconductor device includes a standard cell, which includes first to fourth active areas that are extended in a first direction, first to fourth gate lines that are extended in a second direction perpendicular to the first direction over the first to fourth active areas and are disposed parallel to each other, a first cutting layer that is disposed between the first active area and the second active area and separates the second and third gate lines, a second cutting layer that is disposed between the third active area and the fourth active area and separates the second and third gate lines, a first gate contact that is formed on the second gate line separated by the first cutting layer and the second cutting layer, and a second gate contact that is formed on the third gate line separated by the first cutting layer and the second cutting layer.
    Type: Application
    Filed: September 2, 2020
    Publication date: July 8, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byounggon KANG, Subin JIN, Ha-Young KIM
  • Patent number: D766975
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: September 20, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Serrah Lim, Subin Jin
  • Patent number: D767631
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: September 27, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Serrah Lim, Subin Jin