Abstract: Techniques and systems for tracking multiple objects over a common time period and identifying (i.e., disambiguating) the objects from one another. As described herein, each object may include a respective light source (e.g., one or more LEDs) that may illuminate according to a defined lighting pattern. One or more cameras may capture images of a scene that includes the objects and the images may be analyzed to identify a location of each respective light source within the scene. By identifying these locations over multiple images, the movement of each object may be determined. In some instances, a system that tracks the movement of the objects may iterate through instructing each of the objects to illuminate its light source according to an identification lighting pattern, while other light source(s) of the other respective object(s) continue illuminating their light sources according to a default lighting pattern.

Abstract: Techniques and systems for tracking multiple objects over a common time period and identifying (i.e., disambiguating) the objects from one another. As described herein, each object may include a respective light source (e.g., one or more LEDs) that may illuminate according to a defined lighting pattern. One or more cameras may capture images of a scene that includes the objects and the images may be analyzed to identify a location of each respective light source within the scene. By identifying these locations over multiple images, the movement of each object may be determined. In some instances, a system that tracks the movement of the objects may iterate through instructing each of the objects to illuminate its light source according to an identification lighting pattern, while other light source(s) of the other respective object(s) continue illuminating their light sources according to a default lighting pattern.

Abstract: Both distortion rate and bit-rate can be considered together when selecting a lowest cost motion estimation signal. A motion estimation signal is generated for each of the candidate motion vectors and candidate mode information vectors for a macroblock. An estimated amount of encoding bits is determined for each of the candidate motion vectors, candidate mode information vectors, and quantized coefficients. A bit-rate is computed based on the estimated amount of encoding bits. In addition, a current macroblock is reconstructed with each of the candidate vectors, and distortion measured between each of the reconstructions and the current macroblock. A sum is computed for each distortion measurement and corresponding bit-rate. The lowest sum represents the lowest cost motion estimation signal.

Abstract: A method and apparatus for efficiently performing graphic operations are provided. This is accomplished by providing a processor that supports any combination of the following instructions: parallel multiply-add, conditional pick, parallel averaging, parallel power, parallel reciprocal square root and parallel shifts.

Abstract: The architecture for a combined universal sample rate converter and a sample clock synchronizer is presented. The universal sample rate converter can be applied, for example, to audio samples created or mixed using any of the standard audio frequencies in the set H={8, 11.025, 22.05, 44.1, 48, 96, and 192} kHz and played back using any other frequency from the set H. The synchronizer can be used where audio data are streamed or otherwise broadcast from, for example, the Internet, along with a system timestamp, and where this timestamp needs to be matched to the local audio clock for proper play-back. The same synchronizer can also be used for audio/video or video only synchronization.

Abstract: Method and system for lossless compression coding of a digitally represented image. The image is expressed as one or more blocks, each block having a sequence of pixels with binary pixel values. Within each block, a predictor index is chosen that predicts a pixel value as a linear combination of adjacent (actual) pixel values. The predicted and actual values are compared, and twice the predicted value is compared with the sum of the actual value and a maximum predicted value, to determine a value index, which is used to represent each pixel value in a block in compressed format. Use of the value index representation reduces the average number of bits needed to express each pixel value by an estimated 33-46 percent, reduces the time required for compression encoding by an estimated 4-6 percent, and reduces the time required for decompression by an estimated 49-61 percent.

Abstract: Both distortion rate and bit-rate can be considered together when selecting a lowest cost motion estimation signal. A motion estimation signal is generated for each of the candidate motion vectors and candidate mode information vectors for a macroblock. An estimated amount of encoding bits is determined for each of the candidate motion vectors, candidate mode information vectors, and quantized coefficients. A bit-rate is computed based on the estimated amount of encoding bits. In addition, a current macroblock is reconstructed with each of the candidate vectors, and distortion measured between each of the reconstructions and the current macroblock. A sum is computed for each distortion measurement and corresponding bit-rate. The lowest sum represents the lowest cost motion estimation signal.

Abstract: A method for decoding using a general purpose processor, comprising the steps of extracting a bit field from a data stream; extracting one or more properties from the data stream; matching the one or more properties with one or more tags in a content addressable memory; and generating a new address in response to the content addressable memory.

Abstract: The present invention involves a system and method for performing motion estimation. For each candidate motion vector, encoding distortion is determined between a macroblock and a reconstructed macroblock by determining discrete cosine transform coefficients of the macroblock and quantizing the discrete cosine transform coefficients. An estimate unit determines the length of the bit stream required to encode the quantized discrete cosine transform coefficients along with the mode information bits including mode and motion vector information. The reconstructed macroblock is determined based on the quantized discrete cosine transform coefficients. A bit-rate term based on the length of the bit-rate stream is determined and included in the encoding distortion. The candidate motion vector which minimizes the encoding distortion of the macroblock is chosen to be the motion vector for the macroblock.

Abstract: An apparatus and method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantization values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipelining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and therefore provide a more appealing output image.

Abstract: A method and apparatus for performing single-instruction bit field extraction and for counting a number of leading zeros in a sequence of bits on a general purpose processor are provided. The fast bit extraction operations are accomplished by executing a first instruction for extracting an arbitrary number of bits of a sequence of bits stored in two or more source registers of the processor starting at an arbitrary offset and the storing the extracted bits in a destination register. Both the source and the destination registers are specified by the instruction. In addition, a second instruction is provided for counting the number of leading zeros in a sequence of bits stored in two or more source registers of the processor and then storing a binary value representing the number of leading zeros in a destination register. Again the source and the destination registers are specified by the second instruction.

Abstract: Method and system for lossless compression coding of a digitally represented image. The image is expressed as one or more blocks, each block having a sequence of pixels with binary pixel values. Within each block, a predictor index is chosen that predicts a pixel value as a linear combination of adjacent (actual) pixel values. The predicted and actual values are compared, and twice the predicted value is compared with the sum of the actual value and a maximum predicted value, to determine a value index, which is used to represent each pixel value in a block in compressed format. Use of the value index representation reduces the average number of bits needed to express each pixel value by an estimated 33-46 percent, reduces the time required for compression encoding by an estimated 4-6 percent, and reduces the time required for decompression by an estimated 49-61 percent.

Abstract: A method for decoding using a general purpose processor, comprising the steps of extracting a bit field from a data stream; extracting one or more properties from the data stream; matching the one or more properties with one or more tags in a content addressable memory; and generating a new address in response to the content addressable memory.

Abstract: A method and apparatus are provided for performing efficient conversion operations between floating point and fixed point values on a general purpose processor. This is achieved by providing an instruction for converting a fixed point value fx into a floating point value fl in a general purpose processor. Accordingly, the invention advantageously provides a general purpose processor with the ability to execute conversion operation between fixed-point and floating-point values with a single instruction compared with prior art general purpose processors that require multiple instructions to perform the same function. Thus, the general purpose processor of the present invention allows for more efficient and faster conversion operations between fixed-point and floating-point values.

Abstract: A lossless compression mechanism for compressing and restoring data elements such as text, text formatting, video, audio, speech, and 2D and 3D graphical information. Each data element is compressed using a data structure having a bin number field and an offset field. The bin number field is associated to a bin having a range of values which includes the data element value. The offset field is computed from a minimum bin value, wherein the minimum bin value is associated to the bin and is stored in a bin lookup table. The bin number field is encoded using a unary code, and the offset is encoded using a binary code.

Abstract: Method and system for lossless compression coding of a digitally represented image. The image is expressed as one or more blocks, each block having a sequence of pixels with binary pixel values. Within each block, a predictor index is chosen that predicts a pixel value as a linear combination of adjacent (actual) pixel values. The predicted and actual values are compared, and twice the predicted value is compared with the sum of the actual value and a maximum predicted value, to determine a value index, which is used to represent each pixel value in a block in compressed format. Use of the value index representation reduces the average number of bits needed to express each pixel value by an estimated 33-46 percent, reduces the time required for compression encoding by an estimated 4-6 percent, and reduces the time required for decompression by an estimated 49-61 percent.

Abstract: Method and system for compression coding of a digitally represented video image. The video image is expressed as one or more data blocks in two or more frames, each block having a sequence of pixels with pixel values. Within each block of a frame, an intra-frame predictor index or inter-frame predictor index is chosen that predicts a pixel value as a linear combination of actual pixel values, drawn from one frame or from two or more adjacent frames. The predicted and actual pixel values are compared, and twice the predicted value is compared with the sum of the actual value and a maximum predicted value, to determine a value index, which is used to represent each pixel value in a block in compressed format in each frame. The compression ratios achieved by this coding approach compare favorably with, and may improve upon, the compression achieved by other compression methods.

Abstract: A method and apparatus for performing single-instruction bit field extraction and for counting a number of leading zeros in a sequence of bits on a general purpose processor are provided. The fast bit extraction operations are accomplished by executing a first instruction for extracting an arbitrary number of bits of a sequence of bits stored in two or more source registers of the processor starting at an arbitrary offset and the storing the extracted bits in a destination register. Both the source and the destination registers are specified by the instruction. In addition, a second instruction is provided for counting the number of leading zeros in a sequence of bits stored in two or more source registers of the processor and then storing a binary value representing the number of leading zeros in a destination register. Again the source and the destination registers are specified by the second instruction.

Abstract: The present invention involves a system and method for performing motion estimation. For each candidate motion vector, encoding distortion is determined between a macroblock and a reconstructed macroblock by determining discrete cosine transform cofficients of the macroblock and quantizing the discrete cosine transform coefficients. An estimate unit determines the length of the bit stream required to encode the quantized discrete cosine transform coefficients along with the mode information bits including mode and motion vector information. The reconstructed macroblock is determined based on the quantized discrete cosine transform coefficients. A bit-rate term based on the length of the bit-rate stream is determined and included in the encoding distortion. The candidate motion vector which minimizes the encoding distortion of the macroblock is chosen to be the motion vector for the macroblock.

Abstract: A processor performs precise trap handling for out-of-order and speculative load instructions. It keeps track of the age of load instructions in a shared scheme that includes a load buffer and a load annex. All precise exceptions are detected in a T phase of a load pipeline. Data and control information concerning load operations that hit in the data cache are staged in a load annex during the A1, A2, A3, and T pipeline stages until all exceptions in the same or earlier instruction packet are detected. Data and control information from all other load instructions is staged in the load annex after the load data is retrieved. Before the load data is retrieved, the load instruction is kept in a load buffer. If an exception occurs, any load in the same instruction packet as the instruction causing the exception is canceled. Any load instructions that are “younger” than the instruction that caused the exception are also canceled.