Patents by Inventor Subramanian Balamurugan

Subramanian Balamurugan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6216055
    Abstract: Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (2) and if the partial wafer (half or quarter) contains the reference die (4) move table to a locator die (5) and upload locator die coordinates to wafer map data host (6) and remove other half or quadrants die coordinates from the map (10). If the partial wafer is not in the first half or first quadrant position wafertable to auxiliary reference die, find out which half or quadrant partial wafer belongs (8) and compute auxiliary reference die coordinates from locator die coordinates (9) and then using auxiliary die coordinates as information remove other quadrant or half die coordinates from the map (10).
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: April 10, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Subramanian Balamurugan, Chie-Keong Wong, Russell A. Kent
  • Patent number: 6174788
    Abstract: Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (12) and if the partial wafer contains the reference die (14) move table to a locator die (15) and upload locator die coordinates to wafer map data host (16) and remove other partial wafer die coordinates from the map (17). If the partial wafer does not have the reference die and is not the last partial wafer, position wafer table to auxiliary reference die (18), validate the auxiliary reference die position (19) and compute auxiliary reference die coordinates from locator die coordinates (20) and move wafer table to locator die (22) and upload locator die coordinates to wafer map data host (23) and then using auxiliary reference die and locator die coordinates as information remove other partial wafer die coordinates from the map (24).
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: January 16, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Subramanian Balamurugan
  • Patent number: 6156625
    Abstract: Partial wafer processing is achieved by down loading the wafer map of the whole wafer from a host (2) and display the whole wafer in the die bonder monitor (3) move the wafer table to a first die pickup position (4) and move the display cursor to the first die pickup position (5) and teach two limit die coordinates in X direction (6) and teach two limit die coordinates in Y direction (7) and then using limit die coordinates as information remove other partial wafer die coordinates from the map (8) and select die pickup sequence (9).
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: December 5, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Subramanian Balamurugan
  • Patent number: 6016358
    Abstract: A method for determining the position of a die on a wafer table after a wafer (20) has been cut includes stepping the wafer table (22) a series of one die lengths diagonally and after each step compare the die pattern to a reference die to determine street widths between dies. The widths are then averaged. This averaged street width is added to the die length to at the computer (26) to determine the jump distance between good dies. The distance from the reference die is continuously updated and this is used with the average street width to compute the next die position to jump. If the jump to the next die is unsuccessful, jump back to mid-point and if that is unsuccessful, reiterate mid-point jumps until successful.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: January 18, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Subramanian Balamurugan
  • Patent number: 5933351
    Abstract: A method for locating dies (70) cut from a silicon wafer (54) on a wafer table (14) is provided. The method includes removing a first group of dies (70) with a robot assembly (16). Wafer location data (62) is then generated from the location (66, 68) of the first group of dies (70). Continuous wafer edge coordinates are then determined from the wafer location data (62).
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: August 3, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Subramanian Balamurugan
  • Patent number: 5851848
    Abstract: A method for determining the position of a die on a wafer table after a wafer (20) has been cut includes stepping the wafer table (22) a series of one die lengths diagonally and after each step compare the die pattern to a reference die to determine street widths between dies. The widths are then averaged. This averaged street width is added to the die length to at the computer (26) to determine the jump distance between good dies. The distance from the reference die is continuously updated and this is used with the average street width to compute the next die position to jump. If the jump to the next die is unsuccessful, jump back to mid-point and if that is unsuccessful, reiterate mid-point jumps until successful.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: December 22, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Subramanian Balamurugan