Abstract: Disclosed are methods and apparatuses for charging a hybrid battery pack, the method including determining, by a battery management system (BMS), a current split ratio for allocating charging current to an energy cell and a power cell in a hybrid battery pack, based on any one or any combination of a state of charge (SoC) level of the energy cell at an instance of initiation of charging, a SoC level of the power cell at the instance of the initiation of the charging, a wattage of an adapter for charging the hybrid battery pack, a capacity of the hybrid battery pack, and a charging time period, and charging, by the BMS, the hybrid battery pack by allocating the charging current to the energy cell and the power cell based on the current split ratio.

Abstract: Methods of forming photoresist patterns may include forming a photoresist layer on a substrate, exposing the photoresist layer using an exposure mask, forming a preliminary pattern by developing the exposed photoresist layer and treating a surface of the preliminary pattern using a treatment agent that includes a coating polymer.

Abstract: A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Abstract: Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to the semiconductor chip. The rechargeable micro-battery includes a first current collector and a second current collector, which face each other, a first polarizing electrode in contact with the first current collector and facing the second current collector, a second polarizing electrode in contact with the second current collector and facing the first polarizing electrode, and an electrolyte layer formed between the first and second polarizing electrodes.

Abstract: A method of manufacturing a memory device having a carbon nanotube can be provided by forming a lower electrode on a substrate and forming an insulating interlayer on the lower electrode. An upper electrode including a diode can be formed on the insulating interlayer, where the upper electrode can have a first void exposing a sidewall of the diode and a portion of the insulating interlayer. A portion of the insulating interlayer can be partially removed to form an insulating interlayer pattern having a second void that exposes a portion of the lower electrode, where the second void can be connected with the first void. A carbon nanotube wiring can be formed from the lower electrode through the second and first voids, where the carbon nanotube wiring may be capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode.

Abstract: Provided are a nano filament structure and a method of forming the nano filament structure. The nano filament structure includes a first layer disposed on a substrate, a second layer having a gap of nanometer size disposed on the first layer, a catalyst layer interposed between the first layer and the second layer, and a nano filament. One end of the nano filament is in contact with the catalyst layer and grows by penetrating the gap of the second layer.

Abstract: Methods of forming photoresist patterns may include forming a photoresist layer on a substrate, exposing the photoresist layer using an exposure mask, forming a preliminary pattern by developing the exposed photoresist layer and treating a surface of the preliminary pattern using a treatment agent that includes a coating polymer.

Abstract: In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.

Abstract: A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Abstract: A memory device includes an insulating layer formed over a substrate, a gate formed over the insulating layer, and charge storage elements disposed over the insulating layer. The charge storage elements are separated from each other and are electrically insulated, and each of the charge storage elements is capable of storing at least one charge. The charge storage elements can include fullerenes.

Abstract: A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Abstract: Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to the semiconductor chip. The rechargeable micro-battery includes a first current collector and a second current collector, which face each other, a first polarizing electrode in contact with the first current collector and facing the second current collector, a second polarizing electrode in contact with the second current collector and facing the first polarizing electrode, and an electrolyte layer formed between the first and second polarizing electrodes.

Abstract: A semiconductor device includes a substrate, an insulating layer having an opening, the opening exposing a portion of the substrate, a hydrophobic layer covering substantially only a sidewall and a top surface of the insulating layer, and a nanoscale conductive structure on the exposed portion of the substrate.

Abstract: Provided are a nano filament structure and a method of forming the nano filament structure. The nano filament structure includes a first layer disposed on a substrate, a second layer having a gap of nanometer size disposed on the first layer, a catalyst layer interposed between the first layer and the second layer, and a nano filament.

Abstract: In a memory device having a carbon nanotube and a method of manufacturing the same, the memory device includes a lower electrode, an upper electrode having a first void exposing a sidewall of a diode therein, an insulating interlayer pattern having a second void exposing a portion of the lower electrode between the lower electrode and the upper electrode, and a carbon nanotube wiring capable of being electrically connected with the diode of the upper electrode by a voltage applied to the lower electrode. The memory device may reduce generation of a leakage current in a cross-bar memory.

Abstract: A method of forming a microelectronic device includes forming a groove structure having opposing sidewalls and a surface therebetween on a substrate to define a nano line arrangement region. The nano line arrangement region has a predetermined width and a predetermined length greater than the width. At least one nano line is formed in the nano line arrangement region extending substantially along the length thereof and coupled to the surface of the groove structure to define a nano line structure. Related devices are also discussed.

Abstract: A method of forming a nanoscale structure includes providing a substrate having a first layer thereon, the first layer having an opening that exposes a region of the substrate, and contacting the substrate with a catalytic material, wherein the exposed region of the substrate has a first property that attracts the catalytic material, and the first layer has a second property that repels the catalytic material.

Abstract: A memory device includes an insulating layer formed over a substrate, a gate formed over the insulating layer, and charge storage elements disposed over the insulating layer. The charge storage elements are separated from each other and are electrically insulated, and each of the charge storage elements is capable of storing at least one charge. The charge storage elements can include fullerenes.