Abstract: An integrated control circuit is disclosed including a central processing unit operating in a normal full system power mode and in a reduced system low power mode, and a memory. A plurality of peripheral units are provided, at least one of which includes an input/output for interfacing with at least an external system for receiving information therefrom and a process block. The process block processes the received information from the external system and during the processing of the received information, data is stored in the at least one peripheral unit, and data is transferred at least to or at least from the memory. The input/output and process blocks are fully operable in the full system power mode and the reduced system power mode. A direct memory access (DMA) transfers data directly between the at least one peripheral and the memory when such data transfer is required by the peripheral.