Abstract: Disclosed herein is a semiconductor package having a wire bonding structure. The semiconductor package includes a packaging substrate having a multi-stepped opening extending to a selected depth from the surface of the substrate. The area of the opening decreases as the level from the upper surface decreases. The substrate also includes: a die attach region positioned at the lowest bottom plane of the multi-stepped opening, on which the semiconductor chip is attached; a step plane formed at the upper step plane over the die attach region, on which a plurality of first interconnections for signal transfer paths are printed; and a plurality of outer leads electrically connected to the plurality of first interconnections the plurality of alter leads, projected outwards from the packaging substrate. There is also provided in the package a connecting member having a through hole at its central portion and a plurality of second interconnections at its circumference.