Patents by Inventor Sudhakar Allada

Sudhakar Allada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for testing loop pathway integrity in a fibre channel arbitrated loop
    Publication number: 20050025060
    Abstract: A method for performing a fibre channel arbitrated loop integrity test using a fibre channel switch element is provided. The method includes, sending a fibre channel frame through the arbitrated loop; receiving the fibre channel frame after it has traversed through the arbitrated loop; performing a data compare between the fibre channel frame that was sent and the fibre channel frame that is received; detecting internal errors, if any, in the traversed fibre channel loop; and isolating a module that may have generated the error. The switch element includes, a cascade port that is used to couple one fibre channel switch element to another in a loop; and a port that sends a fibre channel frame through the loop and detects internal errors based on the comparison and a isolates a module that may have generated the internal error.
    Type: Application
    Filed: July 12, 2004
    Publication date: February 3, 2005
    Inventors: John Fike, William Wen, Patricia Hareski, Sudhakar Allada
  • Methylated oxide-type dielectric as a replacement for SiO2 hardmasks used in polymeric low k, dual damascene interconnect integration
    Patent number: 6440853
    Abstract: Disclosed are multilevel interconnects for integrated circuit devices, especially copper/dual damascene devices, and methods of fabrication. Methylated-oxide type hardmasks are formed over polymeric interlayer dielectric materials. Preferably the hardmasks are materials having a dielectric constant of less than 3 and more preferably 2.7 or less. Advantageously, both the hardmask and the interlayer dielectric can be spincoated.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: August 27, 2002
    Assignee: National Semiconductor Corporation
    Inventors: Sudhakar Allada, Chris Foster
  • Methylated oxide-type dielectric as a replacement for SiO2 hardmasks used in polymeric low K, dual damascene interconnect integration
    Publication number: 20010006848
    Abstract: Disclosed are multilevel interconnects for integrated circuit devices, especially copper/dual damascene devices, and methods of fabrication. Methylated-oxide type hardmasks are formed over polymeric interlayer dielectric materials. Preferably the hardmasks are materials having a dielectric constant of less than 3 and more preferably 2.7 or less. Advantageously, both the hardmask and the interlayer dielectric can be spincoated.
    Type: Application
    Filed: December 15, 2000
    Publication date: July 5, 2001
    Applicant: National Semiconductor Corporation
    Inventors: Sudhakar Allada, Chris Foster
  • Methylated oxide-type dielectric as a replacement for SiO2 hardmasks used in polymeric low K, dual damascene interconnect integration
    Patent number: 6218317
    Abstract: Disclosed are multilevel interconnects for integrated circuit devices, especially copper/dual damascene devices, and methods of fabrication. Methylated-oxide type hardmasks are formed over polymeric interlayer dielectric materials. Preferably the hardmasks are materials having a dielectric constant of less than 3 and more preferably 2.7 or less. Advantageously, both the hardmask and the interlayer dielectric can be spincoated.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: April 17, 2001
    Assignee: National Semiconductor Corp.
    Inventors: Sudhakar Allada, Chris Foster