Abstract: Present implementations can include a system with a transistor array including a plurality of charge-trap transistors, the charge-trap transistors being operatively coupled with corresponding input nodes, and a neural integrator including a first integrator node and a second integrator node operatively coupled with the transistor array, and generating an output corresponding to a neuron of a neural network system.

Abstract: Oscillator quick-startup circuit and method in which a voltage step is applied to a resonator (crystal) resulting in ringing which is amplified and fed into a locking circuit which locks to it, such as a programmable delay circuit. Once locking is complete, then the circuit is switched into a standalone oscillator mode, having a feedback path, the output of this injection oscillator energizes the resonator for achieving quick startup of a primary oscillator, in response to it automatically adjusting injection oscillator frequency to match the frequency of the resonator. A digital circuit controls the configuring of the circuit for applying the voltage step, adjusting the locking circuit, and then switching into a standalone oscillator mode.

Abstract: Aspects of the present disclosure provide measurement devices and methods for detecting electrical characteristics of devices under test (DUTs), such as semiconductor nanowires. Techniques described herein provide programmable measurement devices that may be implemented in a compact form factor while being able to perform reliable measurements. In some embodiments, measurement devices described herein may be programmed to modulate signals for transmitting to a DUT, and may demodulate signals from the DUTs adaptively using self-programming techniques described herein. Such self-programming may include applying a programmable phase delay to oscillator signals used during demodulation. In some embodiments, such measurement devices may be implemented on a single circuit board, in a single integrated circuit package, or even on a single solid-state semiconductor die. Techniques described herein may enable reliable, inexpensive, and small-scale fluid sample measurement devices.

Abstract: Oscillator quick-startup circuit and method in which a voltage step is applied to a resonator (crystal) resulting in ringing which is amplified and fed into a locking circuit which locks to it, such as a programmable delay circuit. Once locking is complete, then the circuit is switched into a standalone oscillator mode, having a feedback path, the output of this injection oscillator energizes the resonator for achieving quick startup of a primary oscillator, in response to it automatically adjusting injection oscillator frequency to match the frequency of the resonator. A digital circuit controls the configuring of the circuit for applying the voltage step, adjusting the locking circuit, and then switching into a standalone oscillator mode.

Abstract: The techniques relate to methods and apparatus for determining data indicative of a concentration of an analyte in a fluid. First data indicative of a first property measurement of a first sensor while in fluid communication with the fluid is accessed. Second data indicative of a second property measurement of a second sensor in fluid communication with the fluid is accessed. A set of one or more parameters related to the first sensor, the second sensor, or both are accessed. The data indicative of the concentration of the analyte in the fluid is determined based on the first property measurement, the second property measurement, and the set of one or more parameters.

Abstract: An ultra-low power (ULP) oscillator that down-converts the current of a resonator to DC, then amplifies it when its still in DC, followed by up-converting the amplified signal back to the oscillation frequency. The disclosed oscillator eliminates the minimum transconductance (gm) requirement of a Pierce oscillator, by processing the signal at DC. In addition, the circuit only requires the DC amplifier's feedback resistor to be greater than the resistive loss of the resonator, i.e., Rf>Rm.

Abstract: An ultra-low power (ULP) oscillator that down-converts the current of a resonator to DC, then amplifies it when its still in DC, followed by up-converting the amplified signal back to the oscillation frequency. The disclosed oscillator eliminates the minimum transconductance (gm) requirement of a Pierce oscillator, by processing the signal at DC. In addition, the circuit only requires the DC amplifier's feedback resistor to be greater than the resistive loss of the resonator, i.e., Rf>Rm.

Abstract: Synchronous CDMA/spread spectrum methods, devices, and systems are used to suppress crosstalk in clock-forwarded on-chip interconnects. Transmitting a spread spectrum signal across on-chip interconnects for recovery at the terminus permit integrated chip designers to overcome the effects of capacitive cross-talk between adjacent data bus lines. The methods, devices, and systems provided herein improve cross-talk immunity between adjacent high speed signal lines by applying synchronous CDMA spread spectrum techniques to some or all of the high speed signal lines. Other methods, devices, and systems provided herein apply synchronous CDMA spread spectrum techniques to the concept of sending phantom signals to reduce the number of signal lines used to carry data.

Abstract: A method and apparatus for selective programmable filtering using analog circuits with time-varying components (e.g., resistances, capacitances) is presented. An analog front end receives an electronic signal and filters said signal by a passive or active continuous-time filter, having a combination of equivalent memory-less (e.g., resistive) and memory (e.g., capacitive or inductive) elements. A variable resistor circuit allows switching through a range of values to control one or more of the equivalent resistances of the passive or active continuous-time filter. The variable resistors are controlled using a control circuit to periodically modulate the resistances in the continuous-time filter between periodic sampling instances, such as during analog to digital conversion. Such periodic modulation of the resistances in the continuous-time filter allows for the programming and enhancement of the selectivity of said filter.

Abstract: A power amplifier (PA) which improves dynamic range of previous ZVS contour-based power amplifier architectures is presented. The inventive circuit combines ZVS contour-based power amplification with a current mode digital-to-analog converter (DAC) based digital polar power amplifier. The inventive elements interoperate to provide high efficiency even at large peak power back-off levels and increased dynamic range. The invention is particularly well-suited for use in modulation schemes (e.g., WLAN/LTE/WIMAX) having large peak-to-average output power ratios. Utilizing the inventive PA in generating modulation in these systems can increase RF transmitter efficiency of by approximately two-fold.

Abstract: A zero-voltage-switching contour based outphasing power amplifier having two class-E power amplifiers connected in an out-phasing architecture coupled on opposite sides of a load being driven. The pair of class-E power amplifiers receive separate digital drive signals with an amount of phase difference that is adjusted based on the load. Variable capacitor arrays are coupled in parallel on the class-E power amplifiers and controlled in response to system parameters including duty cycle of the input signal. Efficiency of the power amplifier is maintained despite variation in output loading.

Abstract: A method and apparatus for selective programmable filtering using analog circuits with time-varying components (e.g., resistances, capacitances) is presented. An analog front end receives an electronic signal and filters said signal by a passive or active continuous-time filter, having a combination of equivalent memory-less (e.g., resistive) and memory (e.g., capacitive or inductive) elements. A variable resistor circuit allows switching through a range of values to control one or more of the equivalent resistances of the passive or active continuous-time filter. The variable resistors are controlled using a control circuit to periodically modulate the resistances in the continuous-time filter between periodic sampling instances, such as during analog to digital conversion. Such periodic modulation of the resistances in the continuous-time filter allows for the programming and enhancement of the selectivity of said filter.

Abstract: Synchronous CDMA/spread spectrum methods, devices, and systems are used to suppress crosstalk in clock-forwarded on-chip interconnects. Transmitting a spread spectrum signal across on-chip interconnects for recovery at the terminus permit integrated chip designers to overcome the effects of capacitive cross-talk between adjacent data bus lines. The methods, devices, and systems provided herein improve cross-talk immunity between adjacent high speed signal lines by applying synchronous CDMA spread spectrum techniques to some or all of the high speed signal lines. Other methods, devices, and systems provided herein apply synchronous CDMA spread spectrum techniques to the concept of sending phantom signals to reduce the number of signal lines used to carry data.

Abstract: A zero-voltage-switching contour based outphasing power amplifier having two class-E power amplifiers connected in an out-phasing architecture coupled on opposite sides of a load being driven. The pair of class-E power amplifiers receive separate digital drive signals with an amount of phase difference that is adjusted based on the load. Variable capacitor arrays are coupled in parallel on the class-E power amplifiers and controlled in response to system parameters including duty cycle of the input signal. Efficiency of the power amplifier is maintained despite variation in output loading.

Abstract: Synchronous CDMA/spread spectrum methods, devices, and systems are used to suppress crosstalk in clock-forwarded on-chip interconnects. Transmitting a spread spectrum signal across on-chip interconnects for recovery at the terminus permit integrated chip designers to overcome the effects of capacitive cross-talk between adjacent data bus lines. The methods, devices, and systems provided herein improve cross-talk immunity between adjacent high speed signal lines by applying synchronous CDMA spread spectrum techniques to some or all of the high speed signal lines. Other methods, devices, and systems provided herein apply synchronous CDMA spread spectrum techniques to the concept of sending phantom signals to reduce the number of signal lines used to carry data.

Abstract: A power amplifier (PA) which improves dynamic range of previous ZVS contour-based power amplifier architectures is presented. The inventive circuit combines ZVS contour-based power amplification with a current mode digital-to-analog converter (DAC) based digital polar power amplifier. The inventive elements interoperate to provide high efficiency even at large peak power back-off levels and increased dynamic range. The invention is particularly well-suited for use in modulation schemes (e.g., WLAN/LTE/WIMAX) having large peak-to-average output power ratios. Utilizing the inventive PA in generating modulation in these systems can increase RF transmitter efficiency of by approximately two-fold.

Abstract: A memory system with a simultaneous bi-directional link includes a controller, a memory device and a set of signal lines coupled to the controller and the memory device. Simultaneous communication between the controller and the memory device on the set of signal lines uses a first band of frequencies, and between the memory device and the controller on the set of signal lines uses a second band of frequencies. The controller is configured to dynamically adjust the first band of frequencies based on a predetermined data rate between the controller and the memory device and to dynamically adjust the second band of frequencies based on a predetermined data rate between the memory device and the controller.

Abstract: Synchronous CDMA/spread spectrum methods, devices, and systems are used to suppress crosstalk in clock-forwarded on-chip interconnects. Transmitting a spread spectrum signal across on-chip interconnects for recovery at the terminus permit integrated chip designers to overcome the effects of capacitive cross-talk between adjacent data bus lines. The methods, devices, and systems provided herein improve cross-talk immunity between adjacent high speed signal lines by applying synchronous CDMA spread spectrum techniques to some or all of the high speed signal lines. Other methods, devices, and systems provided herein apply synchronous CDMA spread spectrum techniques to the concept of sending phantom signals to reduce the number of signal lines used to carry data.

Abstract: An integrated circuit device is described. The circuit device may include a group of signal nodes, including a first signal node and a second signal node, a transmitter coupled to the group of signal nodes, and a first clock circuit coupled to the transmitter. The transmitter may transmit a first signal on the first signal node and a second signal on the second signal node. The first signal and the second signal may correspond to a first sequence of data bits during a sequence of bit times. The first clock circuit may control a transmit time of at least one of the first signal and the second signal. The first clock circuit may include a first phase adjustment element that provides compensation for a first timing offset between the first signal and the second signal. The first timing offset may be less than a bit time in the sequence of bit times.

Abstract: A high-speed communications system utilizes approximate bit-loading during data transmission in a channel. In one embodiment, a plurality of parallel data preparation circuits in a data transmission circuit receive respective subsets of a data stream, each of the respective subsets of the data stream having a data rate that is less than a data rate of the data stream. Converters in the data preparation circuits convert the respective subsets of the data stream into respective analog signals. Multipliers in the data preparation circuits multiply the respective analog signals by respective vectors to produce respective sub-channel signals. At least a frequency band in the spectrum corresponding to one of the respective sub-channel signals partially overlaps at least a frequency band for at least one other of the respective sub-channel signals. The respective sub-channel signals are combined prior to transmission.