Abstract: The present invention discloses a ROM memory cell that has significantly less total area than previously known ROM memory cells. Instead of using only one layer in the manufacturing process to program the memory cells, the present invention uses at least two layers to program the memory cells. This flexibility allows the memory cell to be reduced in area, which in turn produces a ROM that is more area efficient and consequently lower in cost. As the bitline length and capacitance are reduced, the speed and power consumption are also improved.