Patents by Inventor Sudhir Nagaraj

Sudhir Nagaraj has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11774936
    Abstract: A method for electrically producing a stalled state in a stepper motor having a first coil and a second coil is provided. The method includes driving a first sinusoidal current through the first coil, and driving a second sinusoidal current through the second coil, wherein the first and second sinusoidal currents are in phase.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: October 3, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakesh Raja, Sudhir Nagaraj, Sooping Saw
  • Patent number: 11101754
    Abstract: In one embodiment, a method includes detecting, by a stall detection sensor in a driver coupled to a stepper motor, a first set of time-off periods in a rising commutation phase of motor current during current regulation. The stall detection sensor further detects a second set of time-off periods in a falling commutation phase of motor current during current regulation. Next, the stall detection sensor compares the first set of time-off periods with the second set of time-off periods and determines whether the stepper motor is stalled based on the comparison of the first set of time-off periods with the second set of time-off periods.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: August 24, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sooping Saw, Rakesh Raja, Wen Pin Lin, Sudhir Nagaraj
  • Patent number: 11063577
    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and to an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: July 13, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Paul Vulpoiu, Rakesh Raja, Sudhir Nagaraj
  • Publication number: 20210011451
    Abstract: A method for electrically producing a stalled state in a stepper motor having a first coil and a second coil is provided. The method includes driving a first sinusoidal current through the first coil, and driving a second sinusoidal current through the second coil, wherein the first and second sinusoidal currents are in phase.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Rakesh Raja, Sudhir Nagaraj, Sooping Saw
  • Patent number: 10824130
    Abstract: A method for electrically producing a stalled state in a stepper motor having a first coil and a second coil is provided. The method includes driving a first sinusoidal current through the first coil, and driving a second sinusoidal current through the second coil, wherein the first and second sinusoidal currents are in phase.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: November 3, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rakesh Raja, Sudhir Nagaraj, Sooping Saw
  • Publication number: 20200304109
    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and to an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.
    Type: Application
    Filed: June 9, 2020
    Publication date: September 24, 2020
    Inventors: Paul VULPOIU, Rakesh RAJA, Sudhir NAGARAJ
  • Publication number: 20200266740
    Abstract: In one embodiment, a method includes detecting, by a stall detection sensor in a driver coupled to a stepper motor, a first set of time-off periods in a rising commutation phase of motor current during current regulation. The stall detection sensor further detects a second set of time-off periods in a falling commutation phase of motor current during current regulation. Next, the stall detection sensor compares the first set of time-off periods with the second set of time-off periods and determines whether the stepper motor is stalled based on the comparison of the first set of time-off periods with the second set of time-off periods.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 20, 2020
    Inventors: Sooping Saw, Rakesh Raja, Wen Pin Lin, Sudhir Nagaraj
  • Publication number: 20200249648
    Abstract: A method for electrically producing a stalled state in a stepper motor having a first coil and a second coil is provided. The method includes driving a first sinusoidal current through the first coil, and driving a second sinusoidal current through the second coil, wherein the first and second sinusoidal currents are in phase.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Inventors: Rakesh Raja, Sudhir Nagaraj, Sooping Saw
  • Patent number: 10707842
    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: July 7, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Paul Vulpoiu, Rakesh Raja, Sudhir Nagaraj
  • Patent number: 10686391
    Abstract: In one embodiment, a method includes detecting, by a stall detection sensor in a driver coupled to a stepper motor, a first set of time-off periods in a rising commutation phase of motor current during current regulation. The stall detection sensor further detects a second set of time-off periods in a falling commutation phase of motor current during current regulation. Next, the stall detection sensor compares the first set of time-off periods with the second set of time-off periods and determines whether the stepper motor is stalled based on the comparison of the first set of time-off periods with the second set of time-off periods.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: June 16, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sooping Saw, Rakesh Raja, Wen Pin Lin, Sudhir Nagaraj
  • Patent number: 10651803
    Abstract: Reducing noise for an amplifier-based system circuit that comprises a first differential input pair and a second differential input pair, a first input stage circuit connected to the first differential input pair, wherein the first input stage is configured with a first transconductance value, a second input stage circuit connected to the second differential input pair, wherein the second input stage is configured with a second transconductance value that is less than the first transconductance value, a transimpedance circuit coupled to the first input stage circuit and the second input stage circuit, and a feedback loop circuit coupled to the transimpedance circuit and to the second differential input pair, wherein the feedback loop circuit is not connected to the first differential input pair.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: May 12, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Seung Bae Lee, Michael Edwin Butenhoff, Sudhir Nagaraj
  • Patent number: 10615779
    Abstract: A system comprises a buffer circuit coupled to a comparator, and an adaptive threshold control circuit coupled to a timer and comparator. Buffer circuit receives a first voltage across a control terminal and a first current terminal of a transistor and a second voltage across a second current terminal and the first current terminal of the transistor. Comparator compares first voltage to a first threshold, generating a first trigger signal when it crosses first threshold, and compares second voltage to a second threshold, generating a second trigger signal when it crosses second threshold. Timer determines length of time between trigger signals. Adaptive threshold control circuit generates a first control signal for first trigger signal, and a second control signal for second trigger signal, and provides a control signal to comparator indicative of whether length of time is greater than or less than user-programmed value, causing comparator to adjust first threshold.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: April 7, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Edwin Butenhoff, Rakesh Raja, Sudhir Nagaraj
  • Publication number: 20190158033
    Abstract: Reducing noise for an amplifier-based system circuit that comprises a first differential input pair and a second differential input pair, a first input stage circuit connected to the first differential input pair, wherein the first input stage is configured with a first transconductance value, a second input stage circuit connected to the second differential input pair, wherein the second input stage is configured with a second transconductance value that is less than the first transconductance value, a transimpedance circuit coupled to the first input stage circuit and the second input stage circuit, and a feedback loop circuit coupled to the transimpedance circuit and to the second differential input pair, wherein the feedback loop circuit is not connected to the first differential input pair.
    Type: Application
    Filed: November 17, 2017
    Publication date: May 23, 2019
    Inventors: Seung Bae Lee, Michael Edwin Butenhoff, Sudhir Nagaraj
  • Publication number: 20190123725
    Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.
    Type: Application
    Filed: October 23, 2017
    Publication date: April 25, 2019
    Inventors: Paul VULPOIU, Rakesh RAJA, Sudhir NAGARAJ
  • Publication number: 20190109551
    Abstract: In one embodiment, a method includes detecting, by a stall detection sensor in a driver coupled to a stepper motor, a first set of time-off periods in a rising commutation phase of motor current during current regulation. The stall detection sensor further detects a second set of time-off periods in a falling commutation phase of motor current during current regulation. Next, the stall detection sensor compares the first set of time-off periods with the second set of time-off periods and determines whether the stepper motor is stalled based on the comparison of the first set of time-off periods with the second set of time-off periods.
    Type: Application
    Filed: September 18, 2018
    Publication date: April 11, 2019
    Inventors: Sooping Saw, Rakesh Raja, Wen Pin Lin, Sudhir Nagaraj
  • Publication number: 20170346425
    Abstract: A motor controller that includes a processing device and a drive circuit. The drive circuit may include a plurality of switches, a motor winding, and a current sensor coupled together in an H-bridge configuration. The processing device is configured to cause a drive current to drive through the motor winding for a minimum amount of time. The processing device is also configured to compare the current through the current sensor to a threshold value at the minimum amount of time. The processing device is also configured to, based on the current being at or above the threshold value at the minimum amount of time, stop the drive current for an off period of time and cause a first decay of the current for a first percentage of the off period of time and a first slow decay for a second percentage of the off period of time.
    Type: Application
    Filed: August 21, 2017
    Publication date: November 30, 2017
    Inventors: Sudhir Nagaraj, Anuj Jain
  • Patent number: 9742329
    Abstract: A motor controller that includes a processing device and a drive circuit. The drive circuit may include a plurality of switches, a motor winding, and a current sensor coupled together in an H-bridge configuration. The processing device is configured to cause a drive current to drive through the motor winding for a minimum amount of time. The processing device is also configured to compare the current through the current sensor to a threshold value at the minimum amount of time. The processing device is also configured to, based on the current being at or above the threshold value at the minimum amount of time, stop the drive current for an off period of time and cause a first decay of the current for a first percentage of the off period of time and a first slow decay for a second percentage of the off period of time.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: August 22, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Sudhir Nagaraj, Anuj Jain
  • Patent number: 9647588
    Abstract: A system and method for a decay lock loop for time varying current regulation in electric motors determines if a predetermined electrical current regulation level for an electric motor has been obtained within a tuning control time window. A coarse control loop increases or decreases a fast current decay, in response to a determination that the predetermined electrical current regulation level has not been obtained within the tuning control time window, until the predetermined electrical current regulation level falls within the tuning control time window. A fine control loop increments or decrements an amount of fast current decay during a total decay time, in response to a determination that the predetermined electrical current regulation level has been obtained within the tuning control time window, until a predetermined timing of the predetermined electrical current regulation level has been obtained.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 9, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Sudhir Nagaraj, David H. Elwart, II, Rakesh Raja, Anuj Jain
  • Publication number: 20160254767
    Abstract: A system and method for a decay lock loop for time varying current regulation in electric motors determines if a predetermined electrical current regulation level for an electric motor has been obtained within a tuning control time window. A coarse control loop increases or decreases a fast current decay, in response to a determination that the predetermined electrical current regulation level has not been obtained within the tuning control time window, until the predetermined electrical current regulation level falls within the tuning control time window. A fine control loop increments or decrements an amount of fast current decay during a total decay time, in response to a determination that the predetermined electrical current regulation level has been obtained within the tuning control time window, until a predetermined timing of the predetermined electrical current regulation level has been obtained.
    Type: Application
    Filed: December 30, 2015
    Publication date: September 1, 2016
    Applicant: Texas Instruments Incorporated
    Inventors: Sudhir Nagaraj, David H. Elwart, II, Rakesh Raja, Anuj Jain
  • Publication number: 20150303850
    Abstract: A motor controller that includes a processing device and a drive circuit. The drive circuit may include a plurality of switches, a motor winding, and a current sensor coupled together in an H-bridge configuration. The processing device is configured to cause a drive current to drive through the motor winding for a minimum amount of time. The processing device is also configured to compare the current through the current sensor to a threshold value at the minimum amount of time. The processing device is also configured to, based on the current being at or above the threshold value at the minimum amount of time, stop the drive current for an off period of time and cause a first decay of the current for a first percentage of the off period of time and a first slow decay for a second percentage of the off period of time.
    Type: Application
    Filed: April 17, 2015
    Publication date: October 22, 2015
    Inventors: Sudhir NAGARAJ, Anuj JAIN