Patents by Inventor Sudhir Polarouthu
Sudhir Polarouthu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11742754Abstract: A one-shot inductor current scheme which includes a controller to generate a signal to control a high-side switch and a low-side switch such that the high-side switch remains turned on beyond a turn-on time if a voltage level on an output supply rail remains below a reference. The scheme reduces the minimum operating voltage Vmin and/or frequency guard-band of the SoCs (system-on-chips).Type: GrantFiled: October 13, 2020Date of Patent: August 29, 2023Assignee: Intel CorporationInventors: Anup J Deka, Shobhit Tyagi, Sudhir Polarouthu, Biranchinath Sahu
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Patent number: 11658572Abstract: For a buck-boost DC-DC converter with n-type high-side field effect transistor (HSFET), a supply is derived from input and output rails, and this supply maintains a constant differential voltage independent of input supply voltage. The derived supply is used as the high supply (HS) of an HSFET Driver. As such, the HSFET resistance becomes independent of supply variation. A wide range ultra-low IQ (Quiescent current), edge triggered level-shifter provides support to a bootstrapped power stage of the inverting buck-boost DC-DC converter. When p-type HSFET is used, a supply is derived from the input and output supply rails, and this derived supply maintains a constant differential voltage independent to the input supply voltage. The derived supply is used as the low supply (LS) or ‘ground’ of the HSFET Driver. As such, the p-type HSFET resistance becomes independent of supply variation.Type: GrantFiled: December 16, 2020Date of Patent: May 23, 2023Assignee: Intel CorporationInventors: Nikunj Gandhi, Gaurav Garg, Apratim Chatterjee, Shobhit Tyagi, Sudhir Polarouthu, Guruvara Nanda Kishore Mutchakarla
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Patent number: 11444537Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: GrantFiled: March 2, 2020Date of Patent: September 13, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Publication number: 20210391795Abstract: For a buck-boost DC-DC converter with n-type high-side field effect transistor (HSFET), a supply is derived from input and output rails, and this supply maintains a constant differential voltage independent of input supply voltage. The derived supply is used as the high supply (HS) of an HSFET Driver. As such, the HSFET resistance becomes independent of supply variation. A wide range ultra-low IQ (Quiescent current), edge triggered level-shifter provides support to a bootstrapped power stage of the inverting buck-boost DC-DC converter. When p-type HSFET is used, a supply is derived from the input and output supply rails, and this derived supply maintains a constant differential voltage independent to the input supply voltage. The derived supply is used as the low supply (LS) or ‘ground’ of the HSFET Driver. As such, the p-type HSFET resistance becomes independent of supply variation.Type: ApplicationFiled: December 16, 2020Publication date: December 16, 2021Applicant: Intel CorporationInventors: Nikunj Gandhi, Gaurav Garg, Apratim Chatterjee, Shobhit Tyagi, Sudhir Polarouthu, Guruvara Nanda Kishore Mutchakarla
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Publication number: 20210124382Abstract: A one-shot inductor current scheme which includes a controller to generate a signal to control a high-side switch and a low-side switch such that the high-side switch remains turned on beyond a turn-on time if a voltage level on an output supply rail remains below a reference. The scheme reduces the minimum operating voltage Vmin and/or frequency guard-band of the SoCs (system-on-chips).Type: ApplicationFiled: October 13, 2020Publication date: April 29, 2021Applicant: Intel CorporationInventors: Anup J. Deka, Shobhit Tyagi, Sudhir Polarouthu, Biranchinath Sahu
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Publication number: 20200274447Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: ApplicationFiled: March 2, 2020Publication date: August 27, 2020Inventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Patent number: 10581326Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: GrantFiled: November 1, 2013Date of Patent: March 3, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Patent number: 10291118Abstract: A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.Type: GrantFiled: December 19, 2017Date of Patent: May 14, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Rejin Kanjavalappil Raveendranath, Sudhir Polarouthu, Jasjot Singh Chadha
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Patent number: 10256779Abstract: An amplifier includes a first transistor coupled to a first voltage source node and a second transistor coupled to a second voltage source node. The first and second transistors also couple together at an intermediate node. The amplifier further includes a third transistor coupled to the intermediate node and a fourth transistor coupled to the third transistor at a positive output node of the amplifier. Further, the amplifier includes a fifth transistor coupled to the intermediate node and a sixth transistor coupled to the fifth transistor at a negative output node of the amplifier.Type: GrantFiled: October 11, 2017Date of Patent: April 9, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Sudhir Polarouthu, Jasjot Singh Chadha, Rejin Raveendranath Kanjavalappil
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Publication number: 20180175728Abstract: A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.Type: ApplicationFiled: December 19, 2017Publication date: June 21, 2018Inventors: Rejin KANJAVALAPPIL RAVEENDRANATH, Sudhir POLAROUTHU, Jasjot Singh CHADHA
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Publication number: 20180175812Abstract: An amplifier includes a first transistor coupled to a first voltage source node and a second transistor coupled to a second voltage source node. The first and second transistors also couple together at an intermediate node. The amplifier further includes a third transistor coupled to the intermediate node and a fourth transistor coupled to the third transistor at a positive output node of the amplifier. Further, the amplifier includes a fifth transistor coupled to the intermediate node and a sixth transistor coupled to the fifth transistor at a negative output node of the amplifier.Type: ApplicationFiled: October 11, 2017Publication date: June 21, 2018Inventors: Sudhir POLAROUTHU, Jasjot Singh CHADHA, Rejin Raveendranath KANJAVALAPPIL
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Patent number: 9823282Abstract: An integrated circuit includes a functional circuit (10) having a power grid (20) with a set of power grid points (30.i) for monitoring; and an electronic monitoring circuit (100) that has a variably operable reference circuit (150) responsive to an input register (155) and having an output, comparison circuitry (110) having plural outputs and having a first input coupled to the output of said variably operable reference circuit (150) and a set of second inputs each second input coupled to a respective one of said power grid points (30.i); and an output register (120) having at least two register bit cells (120.i) respectively fed by the plural outputs of said comparison circuitry (110.i). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.Type: GrantFiled: June 10, 2015Date of Patent: November 21, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Prakash Narayanan, Sudhir Polarouthu
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Patent number: 9214860Abstract: A DC-DC converter receives input power from a power source and generates a regulated DC voltage as an output. The DC-DC converter contains multiple blocks, each of which is powered by a power supply received on a supply terminal. The DC-DC converter also contains a voltage regulator to generate a lower voltage from the power source. The lower voltage generated by the regulator is provided as the power supply on the supply terminal when the regulated DC voltage is less than a reference value, and the regulated DC voltage itself is provided as the power supply on the supply terminal otherwise. The regulator is switched off when the blocks are powered by the regulated DC voltage, thereby leading to increased efficiency of the DC-DC converter.Type: GrantFiled: May 28, 2010Date of Patent: December 15, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ravi Vijayaraghavan, Sudhir Polarouthu
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Publication number: 20150276824Abstract: An integrated circuit includes a functional circuit (10) having a power grid (20) with a set of power grid points (30.i) for monitoring; and an electronic monitoring circuit (100) that has a variably operable reference circuit (150) responsive to an input register (155) and having an output, comparison circuitry (110) having plural outputs and having a first input coupled to the output of said variably operable reference circuit (150) and a set of second inputs each second input coupled to a respective one of said power grid points (30.i); and an output register (120) having at least two register bit cells (120.i) respectively fed by the plural outputs of said comparison circuitry (110.i). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.Type: ApplicationFiled: June 10, 2015Publication date: October 1, 2015Inventors: Prakash Narayanan, Sudhir Polarouthu
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Patent number: 9081063Abstract: An integrated circuit includes a functional circuit (10) having a power grid (20) with a set of power grid points (30.i) for monitoring; and an electronic monitoring circuit (100) that has a variably operable reference circuit (150) responsive to an input register (155) and having an output, comparison circuitry (110) having plural outputs and having a first input coupled to the output of said variably operable reference circuit (150) and a set of second inputs each second input coupled to a respective one of said power grid points (30.i); and an output register (120) having at least two register bit cells (120.i) respectively fed by the plural outputs of said comparison circuitry (110.i). Other integrated circuits, and processes of testing and of manufacturing are also disclosed.Type: GrantFiled: March 29, 2011Date of Patent: July 14, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Prakash Narayanan, Sudhir Polarouthu
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Patent number: 9048728Abstract: Two hysteresis levels, a high level and a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using pairs of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.Type: GrantFiled: October 8, 2012Date of Patent: June 2, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Harikrishna Parthasarathy, Srinivas Venkata Veeramreddi, Sudhir Polarouthu, Baher S. Haroun
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Publication number: 20150123627Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.Type: ApplicationFiled: November 1, 2013Publication date: May 7, 2015Applicant: Texas Instruments IncorporatedInventors: Srinivas Venkata Veeramreddi, Sudhir Polarouthu
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Patent number: 8823341Abstract: The systems and methods of auto-configurable switching/linear regulation disclosed herein enable a device to operate in both DC-to-DC switching regulation and linear regulation applications. The systems and methods disclosed herein differentiate between switching and linear mode. If the application is for a linear regulator, there will only be a capacitor on the output. If the application is for switching mode regulation, there will be an inductor and a capacitor on the output. Then based on the determination, the mode is selected and the hardware is converted into switching regulator operation or linear regulator operation.Type: GrantFiled: October 23, 2012Date of Patent: September 2, 2014Assignee: Texas Instruments IncorporatedInventors: Sudhir Polarouthu, Suresh Mallala, Ranjit Kumar Dash, Sundara Siva Rao Giduturi
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Publication number: 20140111169Abstract: The systems and methods of auto-configurable switching/linear regulation disclosed herein enable a device to operate in both DC-to-DC switching regulation and linear regulation applications. The systems and methods disclosed herein differentiate between switching and linear mode. If the application is for a linear regulator, there will only be a capacitor on the output. If the application is for switching mode regulation, there will be an inductor and a capacitor on the output. Then based on the determination, the mode is selected and the hardware is converted into switching regulator operation or linear regulator operation.Type: ApplicationFiled: October 23, 2012Publication date: April 24, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Sudhir Polarouthu, Suresh Mallala, Ranjit Kumar Dash, Sundara Siva Rao Giduturi
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Publication number: 20140097810Abstract: As disclosed herein, two hysteresis levels, a high level a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using a set of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.Type: ApplicationFiled: October 8, 2012Publication date: April 10, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Harikrishna Parthasarathy, Srinivas Venkata Veeramreddi, Sudhir Polarouthu, Baher S. Haroun