Abstract: The invention discloses method of treatment and reuse of oilfield produced water. The method comprises: providing an aqueous medium comprised at least in part of oilfield produced water; contacting the aqueous medium with a zirconium compound; whereby the fluid viscosity and/or fluid drag reduction ability of the combination of the aqueous medium and zirconium compound is improved compared to the aqueous medium alone; introducing the combination in to the well; and allowing the combination to contact the formation. In another embodiment, the aqueous medium is further contacted by a friction-reduction additive. Still in another embodiment, the aqueous medium is further contacted by a gelling additive. Still in another embodiment, the fluid is energized with a gas.

Abstract: A method of installing a sand control screen assembly in a wellbore penetrating a subterranean formation is carried out in a wellbore having a cased section and an uncased section. The wellbore contains synthetic or oil-based drilling fluids containing drilled solids. A first water-based displacement fluid that contains a shale inhibitor is introduced into the wellbore to displace the synthetic or oil-based drilling fluids from the uncased section of the wellbore. A second water-based displacement fluid is introduced into the wellbore to displace fluids within the cased section of the wellbore. The sand control screen assembly is then run to a selected depth within the uncased section of the wellbore to facilitate a gravel packing operation.

Abstract: According to embodiments of the invention, a system, method and computer program product producing spike-dependent plasticity in an artificial synapse.

Abstract: A structure, memory devices using the structure, and methods of fabricating the structure. The structure includes: an array of nano-fins, each nano-fin comprising an elongated block of semiconductor material extending axially along a first direction, the nano-fins arranged in groups of at least two nano-fins each, wherein ends of nano-fins of each adjacent group of nano-fins are staggered with respect to each other on both a first and a second side of the array; wherein nano-fins of each group of nano-fins are electrically connected to a common contact that is specific to each group of nano-fins such that the common contacts comprise a first common contact on the first side of the array and a second common contact on the second side of the array; and wherein each group of nano-fins has at least two gates that electrically control the conductance of nano-fins of the each group of nano-fins.

Abstract: A method of treating a formation with a well treatment fluid comprising a clay stabilizer comprising a polyamine ether before or during a well treatment such as cleanup, gravel packing, fracturing, or the like. The stabilizer can continue to inhibit fines migration in the treatment zone even after an aqueous fluid without the stabilizer, e.g. a production fluid or injection fluid, displaces the original treatment fluid. When the stabilizer is used in a viscoelastic system (VES) with an acid blend component, the viscosity of the VES is essentially unchanged relative to the VES alone without the stabilizer.

Abstract: A demultiplexer using transistors for accessing memory cell arrays. The demultiplexer includes (a) a substrate; (b) 2N semiconductor regions which are parallel to one another and run in a first direction; (c) first N gate electrode lines, which (i) run in a second direction which is perpendicular to the first direction, (ii) are electrically insulated from the 2N semiconductor regions, and (iii) are disposed between the first plurality of memory cells and the contact region; (d) a contact region; (e) a first plurality of memory cells. An intersection transistor exists at each of intersections between the first N gate electrode lines and the 2N semiconductor regions. In response to pre-specified voltage potentials being applied to the contact region and the first N gate electrode lines, memory cells of the first plurality of memory cells disposed on only one of the 2N semiconductor regions are selected.

Abstract: A structure, memory devices using the structure, and methods of fabricating the structure. The structure includes: an array of nano-fins, each nano-fin comprising an elongated block of semiconductor material extending axially along a first direction, the nano-fins arranged in groups of at least two nano-fins each, wherein ends of nano-fins of each adjacent group of nano-fins are staggered with respect to each other on both a first and a second side of the array; wherein nano-fins of each group of nano-fins are electrically connected to a common contact that is specific to each group of nano-fins such that the common contacts comprise a first common contact on the first side of the array and a second common contact on the second side of the array; and wherein each group of nano-fins has at least two gates that electrically control the conductance of nano-fins of the each group of nano-fins.

Abstract: The invention discloses method of treatment and reuse of oilfield produced water. The method comprises: providing an aqueous medium comprised at least in part of oilfield produced water; contacting the aqueous medium with a zirconium compound; whereby the fluid viscosity and/or fluid drag reduction ability of the combination of the aqueous medium and zirconium compound is improved compared to the aqueous medium alone; introducing the combination in to the well; and allowing the combination to contact the formation. In another embodiment, the aqueous medium is further contacted by a friction-reduction additive. Still in another embodiment, the aqueous medium is further contacted by a gelling additive. Still in another embodiment, the fluid is energized with a gas.

Abstract: A structure, memory devices using the structure, and methods of fabricating the structure. The structure includes: an array of nano-fins, each nano-fin comprising an elongated block of semiconductor material extending axially along a first direction, the nano-fins arranged in groups of at least two nano-fins each, wherein ends of nano-fins of each adjacent group of nano-fins are staggered with respect to each other on both a first and a second side of the array; wherein nano-fins of each group of nano-fins are electrically connected to a common contact that is specific to each group of nano-fins such that the common contacts comprise a first common contact on the first side of the array and a second common contact on the second side of the array; and wherein each group of nano-fins has at least two gates that electrically control the conductance of nano-fins of the each group of nano-fins.

Abstract: A method of installing a sand control screen assembly in a wellbore penetrating a subterranean formation is carried out in a wellbore having a cased section and an uncased section. The wellbore contains synthetic or oil-based drilling fluids containing drilled solids. A first water-based displacement fluid that contains a shale inhibitor is introduced into the wellbore to displace the synthetic or oil-based drilling fluids from the uncased section of the wellbore. A second water-based displacement fluid is introduced into the wellbore to displace fluids within the cased section of the wellbore. The sand control screen assembly is then run to a selected depth within the uncased section of the wellbore to facilitate a gravel packing operation.

Abstract: A system includes a wellbore intersecting a subterranean formation and a treatment flowpath disposed in the wellbore including a fluid path from a surface location to the subterranean formation and returning to the surface location. The treatment flowpath has a delivery flowpath upstream of the subterranean formation and a pertinent flowpath at and downstream of the subterranean formation. The system further includes a gravel pack assembly having a first crossover port fluidly coupling the delivery flowpath to the pertinent flowpath, a screen, a washpipe, and a second crossover port fluidly coupling the washpipe to a return portion of the pertinent flowpath. The system further includes a friction reducing agent that is effective in at least part of the pertinent flowpath, but that is not a friction reducer in solution in the treatment fluid at the surface location.

Abstract: One-stop travel search technology operable to aid users via an improved graphical information display is disclosed. The one-stop travel search technology can be operable to display a graph of the price of the travel mode depending on variables such as time of day. In one embodiment, the one-stop travel search technology further displays information pertaining to travel prices from online travel agents along with those directly obtained from the travel service providers. The technology accesses a travel event database, and directs display of information relating to the travel event based on the event information.

Abstract: A method of treating a formation with a well treatment fluid comprising a clay stabilizer comprising a polyamine ether before or during a well treatment such as cleanup, gravel packing, fracturing, or the like. The stabilizer can continue to inhibit fines migration in the treatment zone even after an aqueous fluid without the stabilizer, e.g. a production fluid or injection fluid, displaces the original treatment fluid. When the stabilizer is used in a viscoelastic system (VES) with an acid blend component, the viscosity of the VES is essentially unchanged relative to the VES alone without the stabilizer.

Abstract: A demultiplexer using transistors for accessing memory cell arrays. The demultiplexer includes (a) a substrate; (b) 2N semiconductor regions which are parallel to one another and run in a first direction; (c) first N gate electrode lines, which (i) run in a second direction which is perpendicular to the first direction, (ii) are electrically insulated from the 2N semiconductor regions, and (iii) are disposed between the first plurality of memory cells and the contact region; (d) a contact region; (e) a first plurality of memory cells. An intersection transistor exists at each of intersections between the first N gate electrode lines and the 2N semiconductor regions. In response to pre-specified voltage potentials being applied to the contact region and the first N gate electrode lines, memory cells of the first plurality of memory cells disposed on only one of the 2N semiconductor regions are selected.

Abstract: A demultiplexer using transistors for accessing memory cell arrays. The demultiplexer includes (a) a substrate; (b) 2N semiconductor regions which are parallel to one another and run in a first direction; (c) first N gate electrode lines, which (i) run in a second direction which is perpendicular to the first direction, (ii) are electrically insulated from the 2N semiconductor regions, and (iii) are disposed between the first plurality of memory cells and the contact region; (d) a contact region; (e) a first plurality of memory cells. An intersection transistor exists at each of intersections between the first N gate electrode lines and the 2N semiconductor regions. In response to pre-specified voltage potentials being applied to the contact region and the first N gate electrode lines, memory cells of the first plurality of memory cells disposed on only one of the 2N semiconductor regions are selected.

Abstract: A demultiplexer using transistors for accessing memory cell arrays. The demultiplexer includes (a) a substrate; (b) 2N semiconductor regions which are parallel to one another and run in a first direction; (c) first N gate electrode lines, which (i) run in a second direction which is perpendicular to the first direction, (ii) are electrically insulated from the 2N semiconductor regions, and (iii) are disposed between the first plurality of memory cells and the contact region; (d) a contact region; (e) a first plurality of memory cells. An intersection transistor exists at each of intersections between the first N gate electrode lines and the 2N semiconductor regions. In response to pre-specified voltage potentials being applied to the contact region and the first N gate electrode lines, memory cells of the first plurality of memory cells disposed on only one of the 2N semiconductor regions are selected.