Patents by Inventor Sudipta Sarkar

Sudipta Sarkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11632119
    Abstract: Embodiments included herein are directed towards a fractional feedback divider circuit and associated method. The circuit may include a programmable feedback divider including a plurality of flip-flops arranged in series. The programmable feedback divider may be configured to receive an input clock signal and a reset signal comprising at least one pulse and to generate a divided clock. The circuit may include reset logic configured to receive an input from the programmable feedback divider and to generate a reset signal. The circuit may include a first D flip-flop configured to receive the reset signal and to generate an output and a second D flip-flop configured to receive the output from the first D flip-flop and to generate a second output. The circuit may further include a multiplexer configured to receive the second output and to generate an output clock signal.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: April 18, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sudipta Sarkar, Dimitrios Loizos, Mehran Mohammadi Izad, Paul Lee, Steven Elliott Mikes, Manohar Bhavsar Nagaraju
  • Publication number: 20220082726
    Abstract: A system is described for calibrating fiber optic well measurements including a fiber optic waveguide disposed proximal to a wellbore, a sensor coupled to the fiber optic waveguide, the sensor configured to record a plurality of signals detected by the waveguide, and a computer system configured to calibrate the signals from the waveguide by filtering out one or more background acoustic responses from the plurality of signals. A method for calibrating the signals is also described.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 17, 2022
    Inventor: Sudipta SARKAR
  • Patent number: 10868505
    Abstract: Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: December 15, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Mohamed M. Elsayed, Sudipta Sarkar
  • Publication number: 20200389140
    Abstract: Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 10, 2020
    Inventors: Mohamed M. Elsayed, Sudipta Sarkar
  • Patent number: 10673383
    Abstract: Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: June 2, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Matthew Powell, Sudipta Sarkar
  • Publication number: 20200099337
    Abstract: Embodiments of clock circuits disclosed herein include a crystal oscillator circuit, an injection oscillator coupled to kick-start the crystal oscillator circuit and a digital frequency calibration circuit coupled to recalibrate the injection oscillator. The crystal oscillator circuit is configured to generate a clock signal at a resonant frequency. The injection oscillator is coupled to supply an oscillation signal at an injection frequency to the crystal oscillator circuit to reduce a start-up time of the crystal oscillator circuit. The digital frequency calibration circuit is coupled to receive the resonant frequency and the injection frequency as inputs, and configured to supply a digital control signal to the injection oscillator to set the injection frequency of the injection oscillator substantially equal to the resonant frequency of the crystal oscillator circuit. Methods are provided herein to recalibrate the injection frequency of an injection oscillator over time, temperature and/or supply voltage.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Inventors: Matthew Powell, Sudipta Sarkar
  • Publication number: 20190138672
    Abstract: A system and method for characterizing uncertainty in a subterranean fracture network by obtaining a natural fracture network, obtaining dynamic data, simulating hydraulic fracturing and microseismic events based on the natural fracture network and the dynamic data, generating a stimulated reservoir volume (SRV), and quantifying the uncertainty in the SRV. It may also include narrowing the uncertainty in the SRV through the use of Design of Experiment methods and characterizing the SRV using static and/or dynamic data.
    Type: Application
    Filed: September 6, 2018
    Publication date: May 9, 2019
    Applicant: Chevron U.S.A. Inc.
    Inventors: Sudipta Sarkar, Adwait Chawathe
  • Patent number: 9939541
    Abstract: A method for locating a microseismic event in a subsurface formation, in some embodiments, comprises: receiving a microseismic signal at a detector; obtaining a velocity model representative of the subsurface formation, the velocity model comprising multiple velocity layers; estimating, for each of the multiple velocity layers in the subsurface formation, a microseismic event location and a microseismic event origin time; and selecting one of the estimated locations and times using a parameter of the microseismic signal received at the detector.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: April 10, 2018
    Assignee: Chevron U.S.A. Inc.
    Inventors: Chang Li, Sudipta Sarkar, Chunquan Yu
  • Publication number: 20180031734
    Abstract: A system is described for calibrating fiber optic well measurements including a fiber optic waveguide disposed proximal to a wellbore, a sensor coupled to the fiber optic waveguide, the sensor configured to record a plurality of signals detected by the waveguide, and a computer system configured to calibrate the signals from the waveguide by filtering out one or more background acoustic responses from the plurality of signals. A method for calibrating the signals is also described.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 1, 2018
    Inventor: Sudipta SARKAR
  • Publication number: 20160202371
    Abstract: A method for locating a microseismic event in a subsurface formation, in some embodiments, comprises: receiving a microseismic signal at a detector; obtaining a velocity model representative of the subsurface formation, the velocity model comprising multiple velocity layers; estimating, for each of the multiple velocity layers in the subsurface formation, a microseismic event location and a microseismic event origin time; and selecting one of the estimated locations and times using a parameter of the microseismic signal received at the detector.
    Type: Application
    Filed: January 9, 2015
    Publication date: July 14, 2016
    Applicant: Chevron U.S.A. Inc.
    Inventors: Chang Li, Sudipta Sarkar, Chunquan Yu
  • Publication number: 20140358510
    Abstract: A system and method for characterizing uncertainty in a subterranean fracture network by obtaining a natural fracture network, obtaining dynamic data, simulating hydraulic fracturing and microseismic events based on the natural fracture network and the dynamic data, generating a stimulated reservoir volume (SRV), and quantifying the uncertainty in the SRV. It may also include narrowing the uncertainty in the SRV through the use of Design of Experiment methods and characterizing the SRV using static and/or dynamic data.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Applicant: CHEVRON U.S.A. INC.
    Inventors: Sudipta Sarkar, Adwait Chawathe
  • Publication number: 20120234765
    Abstract: Provided herein are systems and methods for use in wastewater treatment. In some examples, the systems and methods involve different combinations of ion exchange and membrane based systems and processes that can be used to remove radium and recover and purify barium and strontium salts to render the wastewater depleted of those regulated toxic metals. Treated wastewater having less than 12000 pCi/L of any of radium, barium or strontium is then subjected to tertiary treatment where it is subjected to processes in an evaporator/crystallizer which drives out water in the form of vapor, leaving behind salts of innocuous metals such as sodium, calcium, and magnesium, among others. In some examples, water vapor from the processes is condensed to produce water suitable for reuse, such as reuse in the hydro-fracturing process.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 20, 2012
    Applicant: LEHIGH UNIVERSITY
    Inventors: Arup K. SenGupta, Sudipta Sarkar, Prasun K. Chatterjee
  • Patent number: 7901577
    Abstract: Desalination is carried out by a hybrid ion exchange-nanofiltration process in which ion exchange is followed by pressure-driven nanofiltration. Monovalent ions of sodium and chloride of saline water are exchanged for equivalent concentrations of poly-valent ions (for example, sodium ions for magnesium ions or chloride ions for sulfate ions) when passed through ion exchangers in the form of those poly-valent ions. The resultant solution has a lower osmotic pressure than the initial solution containing monovalent sodium and chloride ions, and requires less transmembrane pressure for membrane desalination compared to traditional reverse osmosis. The concentrated reject stream from the membrane process is used as regenerant for the exhausted ion exchanger, which has been converted to monovalent anionic or cationic form.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: March 8, 2011
    Inventors: Arup K. SenGupta, Sudipta Sarkar
  • Publication number: 20100282675
    Abstract: Desalination is accomplished by subjecting feed saline water to a cation exchanger in magnesium form where sodium and scale-forming cations are at least partially exchanged for non-scale-forming magnesium ions. This ion exchange also reduces the osmotic pressure of the solution. When the resultant solution is subjected to a pressure-driven membrane desalination process, scaling is reduced and desalinated water is efficiently produced at a lower pressure. After desalination, the concentrated waste water, which contains higher concentrations of ions such as magnesium and sodium, is used to regenerate the depleted cation exchanger back into magnesium form. This regeneration permits the process to be self-sustainable.
    Type: Application
    Filed: November 24, 2009
    Publication date: November 11, 2010
    Applicant: LEHIGH UNIVERSITY
    Inventors: Arup K. SenGupta, Sudipta Sarkar
  • Publication number: 20080277344
    Abstract: Desalination is carried out by a hybrid ion exchange-nanofiltration process in which ion exchange is followed by pressure-driven nanofiltration. Monovalent ions of sodium and chloride of saline water are exchanged for equivalent concentrations of poly-valent ions (for example, sodium ions for magnesium ions or chloride ions for sulfate ions) when passed through ion exchangers in the form of those poly-valent ions. The resultant solution has a lower osmotic pressure than the initial solution containing monovalent sodium and chloride ions, and requires less transmembrane pressure for membrane desalination compared to traditional reverse osmosis. The concentrated reject stream from the membrane process is used as regenerant for the exhausted ion exchanger, which has been converted to monovalent anionic or cationic form.
    Type: Application
    Filed: February 13, 2008
    Publication date: November 13, 2008
    Inventors: Arup K. SenGupta, Sudipta Sarkar