Patents by Inventor Sufiyan Syed

Sufiyan Syed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250217155
    Abstract: Techniques for early resteering of a branch misprediction are described. Examples detailed herein use a virtual run-ahead mechanism in the core. On a branch misprediction for an hard-to-predict (H2P) branch, a subset of the backslice of the H2P branch are replayed from the out-of-order engine directly (while the main thread is flushing and restarting execution from the front-end).
    Type: Application
    Filed: December 30, 2023
    Publication date: July 3, 2025
    Inventors: Aniket Deshmukh, Sufiyan Syed, Jayesh Gaur, Sreenivas Subramoney
  • Publication number: 20240103878
    Abstract: An example of an integrated circuit may include a first execution cluster, a second execution cluster that is one or more of narrower and shallower as compared to the first execution cluster, and circuitry to selectively steer instructions to the first execution cluster and the second execution cluster based on branch misprediction information. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Jayesh Gaur, Sufiyan Syed, Adithya Ranganathan, Sreenivas Subramoney
  • Publication number: 20230195456
    Abstract: In one embodiment, an apparatus includes: a plurality of execution circuits to execute and instruct micro-operations (?ops), where a subset of the plurality of execution circuits are capable of execution of a fused ?op; a fusion circuit coupled to at least the subset of the plurality of execution circuits, wherein the fusion circuit is to fuse at least some pairs of producer-consumer ?ops into fused ?ops; and a fusion throttle circuit coupled to the fusion circuit, wherein the fusion throttle circuit is to prevent a first ?op from being fused with another ?op based at least in part on historical information associated with the first ?op. Other embodiments are described and claimed.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Inventors: Sufiyan Syed, Roger Gramunt, Jayesh Gaur, Priyank Deshpande