Patents by Inventor Sughosh Pavan SHASHIDHAR

Sughosh Pavan SHASHIDHAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166983
    Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
    Type: Grant
    Filed: December 6, 2023
    Date of Patent: December 10, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12166982
    Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: December 10, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12160600
    Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: December 3, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Chong Soon Lim, Sughosh Pavan Shashidhar, Ru Ling Liao, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Kiyofumi Abe, Tadamasa Toma, Takahiro Nishi
  • Publication number: 20240388707
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 12137207
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: November 5, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Sughosh Pavan Shashidhar, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20240364916
    Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
    Type: Application
    Filed: July 10, 2024
    Publication date: October 31, 2024
    Inventors: Kiyofumi ABE, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240357169
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 24, 2024
    Inventors: Chong Soon LIM, Han Boon TEO, Takahiro NISHI, Tadamasa TOMA, Ru Ling LIAO, Sughosh Pavan SHASHIDHAR, Hai Wei SUN
  • Publication number: 20240357170
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Application
    Filed: July 3, 2024
    Publication date: October 24, 2024
    Inventors: Chong Soon LIM, Han Boon TEO, Takahiro NISHI, Tadamasa TOMA, Ru Ling LIAO, Sughosh Pavan SHASHIDHAR, Hai Wei SUN
  • Patent number: 12126795
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: October 22, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Sughosh Pavan Shashidhar, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12120291
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: October 15, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Sughosh Pavan Shashidhar, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12114004
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: October 8, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240323405
    Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.
    Type: Application
    Filed: May 22, 2024
    Publication date: September 26, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 12088791
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: September 10, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Sughosh Pavan Shashidhar, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12081752
    Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: September 3, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 12069303
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: August 20, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Patent number: 12069245
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: August 20, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Ru Ling Liao, Chong Soon Lim, Hai Wei Sun, Han Boon Teo, Jing Ya Li, Sughosh Pavan Shashidhar, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 12063383
    Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: August 13, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 12063390
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: August 13, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Publication number: 20240267520
    Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
    Type: Application
    Filed: April 19, 2024
    Publication date: August 8, 2024
    Inventors: Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Chong Soon LIM, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Jing Ya LI
  • Patent number: 12034940
    Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: July 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li