Patents by Inventor Suguru KADOWAKI

Suguru KADOWAKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250106984
    Abstract: A wiring board with a stiffener includes a wiring board, a mounting region located on an upper surface of the wiring board, and a stiffener located on the upper surface of the wiring board to surround the mounting region and including a first surface facing the wiring board and a second surface located opposite to the first surface. The wiring board has a first thermal expansion coefficient. The stiffener includes a first region facing the wiring board, including the first surface, and a second thermal expansion coefficient, and a second region located on a surface side opposite to the first region, including the second surface, and has a third thermal expansion coefficient. An absolute value of a difference between the first and second thermal expansion coefficients is smaller than an absolute value of a difference between the first thermal expansion coefficient and the third thermal expansion coefficient.
    Type: Application
    Filed: December 23, 2022
    Publication date: March 27, 2025
    Applicant: KYOCCERA CORPORATION
    Inventors: Suguru KADOWAKI, Shohei ONIMARU
  • Publication number: 20250016912
    Abstract: A wiring board includes a first insulation layer comprising first and second surfaces; a second insulation layer located at an outermost layer on the first surface; a third insulation layer located at an outermost layer on the second surface; a first mounting region located on an outermost surface on the first surface; a second mounting region located on the outermost surface on the first surface and surrounding the first mounting region; a plane conductor located on the third insulation layer; and a solder resist covering the third insulation layer and the plane conductor and having an opening that exposes part of the plane conductor. In plane perspective, in a frame-shaped region between outer peripheral edges of the first and second mounting regions, the plane conductor comprises clearances at point-symmetric positions taking a center of the opening as a point of symmetry.
    Type: Application
    Filed: November 29, 2022
    Publication date: January 9, 2025
    Applicant: KYOCERA Corporation
    Inventors: Takafumi OYOSHI, Suguru KADOWAKI