Patents by Inventor Suguru Watanabe

Suguru Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141314
    Abstract: The information processing device includes: a cultivation information acquisition unit configured to acquire cultivation information of a cell; and a recommended condition setting unit configured to set a recommended condition for detaching the cell from a to be-processed vessel in which the cell is cultured, the cultivation information including information about the to-be-processed vessel, the recommended condition being a condition for detaching the cell by applying vibration to the to-be-processed vessel, the recommended condition setting unit being configured to set the recommended condition based on the cultivation information, with use of information concerning an association relationship between information about a cultivation condition and information about a detachment condition, the information about the cultivation condition including information about a culture vessel, the information about the detachment condition including information about a condition for applying vibration to the culture vess
    Type: Application
    Filed: October 17, 2023
    Publication date: May 2, 2024
    Inventors: KENJIRO TAKEMURA, YUTA KURASHINA, CHIKAHIRO IMASHIRO, KAZUNORI NOGUCHI, MASASHI HIROSE, KATSUHISA YAMAZAKI, KEIICHIRO TSUBAKI, SUGURU WATANABE, AKIRA SUGIYAMA, KENICHI KAKU, RYUICHI OTSU, YUKARI NAKASHOJI, TAKAAKI FURUI, TATSUO FURUTA, HITOMI TOKUTAKE
  • Publication number: 20240141281
    Abstract: The information processing device includes: a cultivation information acquisition unit configured to acquire cultivation information of a cell; and a recommended condition generation unit configured to generate a recommended condition for detaching the cell from a to-be-processed vessel in which the cell is cultured, the cultivation information including information about the to-be-processed vessel, the recommended condition being a condition for detaching the cell by applying vibration to the to-be-processed vessel, the recommended condition generation unit being configured to generate the recommended condition based on the cultivation information, with use of a learned model, the learned model being learned with use of information about a cultivation condition and information about a detachment condition, the information about the cultivation condition including information about a culture vessel, the information about the detachment condition including information about a condition for applying vibration t
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: KENJIRO TAKEMURA, YUTA KURASHINA, CHIKAHIRO IMASHIRO, KAZUNORI NOGUCHI, KATSUHISA YAMAZAKI, MASASHI HIROSE, KEIICHIRO TSUBAKI, SUGURU WATANABE, AKIRA SUGIYAMA, KENICHI KAKU, TAKAAKI FURUI, TATSUO FURUTA, HITOMI TOKUTAKE, RYUICHI OTSU, YUKARI NAKASHOJI
  • Publication number: 20240136274
    Abstract: A quantum device capable of effectively cooling a quantum chip and an area (e.g., a space) therearound is provided. A quantum device includes a quantum chip and an interposer on which the quantum chip is located. The interposer includes an interposer substrate and an interposer wiring layer. The interposer wiring layer is disposed on a surface of the interposer substrate on a side on which the quantum chip is located. The interposer wiring layer includes, in at least a part thereof, a superconducting material layer formed of a superconducting material and a non-superconducting material layer formed of a non-superconducting material.
    Type: Application
    Filed: July 26, 2023
    Publication date: April 25, 2024
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI
  • Patent number: 11948461
    Abstract: An information processing device includes: an data acquisition unit that acquires sensor data of an infrastructure sensor; an object information generation unit that generates object information based on the sensor data; a detection range estimation unit that estimates an object detection range based on at least partial information constituting the object information; an intersection determination unit that determines whether the objects intersect with each other within a predetermined time based on at least partial information constituting the object information; and a signal output unit that outputs an intersection avoidance signal when a position of a second object is outside the object detection range of a first object or when the position of the first object is outside the object detection range of the second object.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 2, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Suguru Watanabe, Manabu Nagai, Daisaku Honda
  • Publication number: 20240079256
    Abstract: A substrate processing apparatus includes; a carrier block; a first processing block including first lower and upper processing blocks to deliver a substrate to and from the carrier block; a second processing block including second lower and upper processing blocks provided adjacent to the first lower and upper processing blocks; a relay block including a lifting and transferring mechanism that delivers the substrate between the second lower and upper processing blocks; a controller that controls an operation of each main transfer mechanism such that one of upper and lower processing blocks forms an outward path through which the substrate is transferred from the carrier block to the relay block and the other forms a return path through which the substrate is transferred from the relay block to the carrier block; and a bypass transfer mechanism provided for each of the first and second processing blocks.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Tsuyoshi WATANABE, Masashi TSUCHIYAMA, Suguru ENOKIDA, Taro YAMAMOTO
  • Publication number: 20240079281
    Abstract: A quantum device includes a quantum chip including a superconducting quantum circuit; an interposer including mounting the quantum chip on a first surface thereof; a housing having openings penetrating from a first surface of the housing opposing a second surface of the interposer to a second surface of the housing with probe pins housed in the opening, a board with a first surface facing the second surface of the housing; and one or more spacers between the first surface of the housing and the second surface of the interposer to ensure a clearance between the first surface of the housing and the second surface of the interposer facing the first surface of the housing.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 7, 2024
    Applicant: NEC Corporation
    Inventors: Suguru WATANABE, Kunihiko ISHIHARA, Katsumi KIKUCHI
  • Publication number: 20240075410
    Abstract: There is provided a gas solution supply apparatus capable of preventing bubbles from being generated in use at a point-of-use even if gas solution to be provided to a point-of-use has a high concentration. The gas solution supply apparatus 1 includes: a gas dissolving unit 4 that dissolves a source gas in a source liquid to produce a first gas solution; a first gas-liquid separator 10 that stores the first gas solution produced and produces a second gas solution through gas-liquid separation of the first gas solution; a pressure reducer 17 that depressurizes the second gas solution produced in the first gas-liquid separator 10; and a second gas-liquid separator 12 that stores the depressurized second gas solution and produces a third gas solution through gas-liquid separation of the second gas solution. The third gas solution is supplied to a point-of-use.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Inventors: Suguru OZAWA, Yuji ARAKI, Yoichi NAKAGAWA, Toshifumi WATANABE, Risa KIMURA, Ryuta KATO
  • Publication number: 20240065116
    Abstract: A quantum device includes a quantum chip; an interposer flip chip mounting the quantum chip; and a socket including a housing has opening housing signal probe pins and ground probe pins. An inner wall of the opening housing the ground probe pin is covered with a metal layer, at least a part of the ground probe pin is thermally in contact with the metal layer of the inner wall which continues to a metal layer formed on at least a partial region of at least one of the first surface and the second surface of the housing.
    Type: Application
    Filed: August 15, 2023
    Publication date: February 22, 2024
    Applicant: NEC Corporation
    Inventors: Kunihiko Ishihara, Suguru Watanabe, Katsumi Kikuchi
  • Publication number: 20240021078
    Abstract: An intersection control apparatus controls entries of vehicles into an intersection. The intersection control apparatus includes an intersection environment information acquisition unit configured to acquire a plurality of types of intersection environment information, an information conversion unit configured to encode the intersection environment information into a predetermined bit length for each type of the intersection environment information, an intersection control information generation unit configured to generate at least one intersection control information piece by integrating the plurality of types of intersection environment information through bit operations, and an intersection control unit configured to control the entries of the vehicles into the intersection using the at least one intersection control information piece.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 18, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Manabu NAGAI, Suguru Watanabe
  • Patent number: 11871682
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); a first connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111); and a second connection part (140) that is provided on a main surface of the interposer (112) where the first connection part (130) is arranged and is connected to a cooling plate (115).
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: January 9, 2024
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Publication number: 20230408605
    Abstract: A magnetic field detection device includes a base, a first yoke, and a magneto-resistive effect element. The first yoke is provided on the base, and includes first and second principal surfaces each extending along a first plane, and a first end surface coupling the first and second principal surfaces. The magneto-resistive effect element is provided on the base, and includes a magnetization free layer disposed at a position overlapped with the first yoke in a first direction along the first plane. The first end surface includes an inverted tapered surface inclined relative to the first plane and extending closer to a center point of the magnetization free layer as being away from the base in a second direction orthogonal to the first plane. A distance from the center point to a first edge is shorter than a distance from the center point to a second edge.
    Type: Application
    Filed: August 31, 2023
    Publication date: December 21, 2023
    Applicant: TDK CORPORATION
    Inventors: Yoshiaki TANAKA, Tetsuya HIRAKI, Kazuya WATANABE, Suguru WATANABE
  • Publication number: 20230368664
    Abstract: An intersection control apparatus includes a decision unit that decides first intersection control information, second intersection control information, and third intersection control information and a distribution unit that distributes the first intersection control information, the second intersection control information, and the third intersection control information to a plurality of vehicles scheduled to pass through the intersection in the recited order. The first intersection control information and the third intersection control information include a plurality of permitted track information pieces. The second intersection control information includes at least one permitted track information piece. The first intersection control information, the second intersection control information, and the third intersection control information are different from each other.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 16, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Manabu NAGAI, Suguru Watanabe
  • Patent number: 11805708
    Abstract: A quantum device according to an example embodiment includes a quantum chip 10, and an interposer 20 on which the quantum chip 10 is mounted, in which the interposer 20 includes a conductive wiring line CL1 electrically connected to the quantum chip 10, a mounting surface 21 of the interposer 20 on which the quantum chip 10 is mounted or an opposite surface 22 opposite to the mounting surface 21 includes a first area AR11 and a second area AR12 different from the first area AR11 as viewed in a direction perpendicular to the mounting surface 21 or the opposite surface 22, the conductive wiring line CL1 is disposed in the first area AR11 on the mounting surface 21 or the opposite surface 22, and a movable member 60 is in contact with the second area AR12 of the interposer 20.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: October 31, 2023
    Assignee: NEC CORPORATION
    Inventors: Katsumi Kikuchi, Akira Miyata, Suguru Watanabe, Takanori Nishi, Hideyuki Satou, Kenji Nanba, Ayami Yamaguchi
  • Publication number: 20230345844
    Abstract: Provided is a quantum device capable of improving cooling performance. A quantum device includes a quantum chip configured to perform information processing using a quantum state, and an interposer on which the quantum chip is mounted, and the quantum chip is arranged inside a recess 31 formed in a sample stage having a cooling function, and a part of the interposer is in contact with the sample stage. The quantum chip may have a first surface mounted on the interposer and a second surface opposite to the first surface, and at least a part of the second surface may be in contact with an inner surface of the recess.
    Type: Application
    Filed: June 5, 2020
    Publication date: October 26, 2023
    Applicant: NEC Corporation
    Inventors: Katsumi KIKUCHI, Akira MIYATA, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Kenji NANBA, Ayami YAMAGUCHI
  • Patent number: 11798895
    Abstract: A quantum device (100) includes an interposer (112), a quantum chip (111) mounted on the interposer (112), and a shield part (150) provided so as to surround a quantum circuit region of the interposer (112) and the quantum chip (111). Accordingly, the quantum device (100) is able to prevent interference in the quantum circuit region due to exogenous noise.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: October 24, 2023
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Patent number: 11782104
    Abstract: A magnetic field detection device includes a base, a first yoke, and a magneto-resistive effect element. The first yoke is provided on the base, and includes first and second principal surfaces each extending along a first plane, and a first end surface coupling the first and second principal surfaces. The magneto-resistive effect element is provided on the base, and includes a magnetization free layer disposed at a position overlapped with the first yoke in a first direction along the first plane. The first end surface includes an inverted tapered surface inclined relative to the first plane and extending closer to a center point of the magnetization free layer as being away from the base in a second direction orthogonal to the first plane. A distance from the center point to a first edge is shorter than a distance from the center point to a second edge.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: October 10, 2023
    Assignee: TDK CORPORATION
    Inventors: Yoshiaki Tanaka, Tetsuya Hiraki, Kazuya Watanabe, Suguru Watanabe
  • Publication number: 20230276717
    Abstract: Provided are an oscillator and a quantum computer capable of suppressing an occupied area of a circuit. An oscillator (300) includes a resonator (100) including a plurality of loop circuits in which a first superconducting line (112a), a first Josephson junction (111a), a second superconducting line (112b), and a second Josephson junction (111b) are annularly connected, and a magnetic field application circuit (200) including an electrode that goes around in a predetermined shape and configured to apply a magnetic field to the loop circuit, in which the electrode is arranged so as to face at least two of the loop circuits.
    Type: Application
    Filed: June 5, 2020
    Publication date: August 31, 2023
    Applicant: NEC Corporation
    Inventors: Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Tomohiro YAMAJI, Tsuyoshi YAMAMOTO, Yoshihito HASHIMOTO
  • Publication number: 20230237362
    Abstract: Provided is a quantum device capable of suppressing reduction in performance of quantum bit even when a quantum chip is flip-chip mounted on an interposer. A quantum chip (10) is flip-chip mounted on an interposer (20) by a bump (30). A coplanar line (12) coupling adjacent quantum bits is formed on the quantum chip (10). A gap (22) is provided, in the interposer (20), at a location facing a center conductor (12a) of the coplanar line (12). A second ground electrode (24) is formed around gap (22). The interposer (20) has a connection electrode (40) connecting the second ground electrode (24) around the gap (22). A bump (30A) formed in the vicinity of the connection electrode (40) is connected to the first ground electrode (12b) and the second ground electrode (24).
    Type: Application
    Filed: June 5, 2020
    Publication date: July 27, 2023
    Applicant: NEC Corporation
    Inventors: Akira MIYATA, Katsumi KIKUCHI, Suguru WATANABE, Takanori NISHI, Hideyuki SATOU, Tomohiro YAMAJI, Tsuyoshi YAMAMOTO, Yoshihito HASHIMOTO
  • Patent number: 11696517
    Abstract: A quantum device (100) includes: an interposer (112); a quantum chip (111); and a connection part (130) that is provided between the interposer (112) and the quantum chip (111) and electrically connects a wiring layer of the interposer (112) to a wiring layer of the quantum chip (111), in which the connection part (130) includes: a plurality of pillars (131) arranged on a main surface of the interposer (112); and a metal film (132) provided on a surface of the plurality of pillars (131) in such a way that it contacts the wiring layer of the quantum chip (111) and the thickness of the metal film at outer peripheral parts of the tip of each of the plurality of pillars (131) becomes larger than the thickness of the metal film at a center part of the tip of each of the plurality of pillars (131).
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: July 4, 2023
    Assignee: NEC CORPORATION
    Inventors: Kenji Nanba, Ayami Yamaguchi, Akira Miyata, Katsumi Kikuchi, Suguru Watanabe, Takanori Nishi, Hideyuki Satou
  • Publication number: 20230177700
    Abstract: An estimation result determination unit determines, for each of the objects, a correct estimation result or one of a plurality of false estimation types, which indicate types of false estimation results using ground truth data that corresponds to a video image and output data indicating the result of the estimation made on the video image by the algorithm. The evaluation value calculation unit adds false estimation coefficients that correspond to the plurality of respective false estimation types and are provided so as to become higher in accordance with a degree of impact of the false estimation type for a number of objects that correspond to the false estimation type and thus calculates an evaluation value of the algorithm based on the total value of the added values of the false estimation coefficients obtained for each of the plurality of false estimation types.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 8, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Manabu NAGAI, Suguru WATANABE, Yusuke NAKANO