Patents by Inventor Suh-Fang Lin

Suh-Fang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170104074
    Abstract: In an embodiment, a III-V nitride semiconductor device comprises an AlGaN epitaxial layer and a metal electrode. The AlGaN epitaxial layer is a C-plane n-type or undoped layer, and the AlGaN epitaxial layer has an epitaxial surface consisting of one or more semi-polar planes. The metal electrode is directly formed on the one or more semi-polar planes.
    Type: Application
    Filed: November 25, 2015
    Publication date: April 13, 2017
    Inventors: Wei-Hung Kuo, Suh-Fang Lin, Kun-Fong Lin, Chia-Lung Tsai
  • Patent number: 9111851
    Abstract: Provided is an enhancement mode GaN-based transistor device including an epitaxial stacked layer disposed on a substrate; a source layer and a drain layer disposed on a surface of the epitaxial stacked layer; a p-type metal oxide layer disposed between the source layer and the drain layer; and a gate layer disposed on the p-type metal oxide layer. Besides, the p-type metal oxide layer includes a body part disposed on the surface of the epitaxial stacked layer, and a plurality of extension parts connecting the body part and extending into the epitaxial stacked layer. With such structure, the enhancement mode GaN-based transistor device can effectively suppress generation of the gate leakage current.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: August 18, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Hung Kuo, Suh-Fang Lin, Rong Xuan
  • Patent number: 8587017
    Abstract: A light emitting device and a method of fabricating a light emitting device are provided. The light emitting device includes a carrier substrate, at least one epitaxy structure, a high resistant ring wall, a first electrode, and a second electrode. The epitaxy structure is disposed on the carrier substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is relatively away from the carrier substrate and the second semiconductor layer is relatively close to the carrier substrate. The high resistant ring wall surrounds the epitaxy structure and a width of the high resistant ring wall is greater than 5 ?m. The first electrode is disposed between the carrier substrate and the epitaxy structure. The second electrode is disposed at a side of the epitaxy structure away from the carrier substrate.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: November 19, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Hung Kuo, Yi-Keng Fu, Suh-Fang Lin, Rong Xuan
  • Patent number: 8188573
    Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: May 29, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Suh-Fang Lin, Wei-Hung Kuo
  • Publication number: 20120119220
    Abstract: A nitride semiconductor substrate includes an epitaxy substrate, a patterned nitride semiconductor pillar layer, a nitride semiconductor layer, and a mask layer is provided. The nitride semiconductor pillar layer includes a plurality of first patterned arranged hollow structures and a plurality of second patterned arranged hollow structures formed among the first patterned arranged hollow structures. The second patterned arranged hollow structures have nano dimensions. The nitride semiconductor pillar layer is formed on the epitaxy substrate, and the nitride semiconductor layer is formed on the nitride semiconductor pillar layer. The mask layer covers surfaces of the nitride semiconductor pillar layer and the epitaxy substrate.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 17, 2012
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Suh-Fang Lin, Wei-Hung Kuo, Po-Chun Liu, Tung-Wei Chi, Chu-Li Chao, Jenq-Dar Tsay
  • Patent number: 8173456
    Abstract: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: May 8, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Jenq-Dar Tsay, Suh-Fang Lin, Yu-Hsiang Chang, Yih-Der Guo, Sheng-Huei Kuo, Wei-Hung Kuo, Hsun-Chih Liu
  • Publication number: 20110254044
    Abstract: A light emitting device and a method of fabricating a light emitting device are provided. The light emitting device includes a carrier substrate, at least one epitaxy structure, a high resistant ring wall, a first electrode, and a second electrode. The epitaxy structure is disposed on the carrier substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is relatively away from the carrier substrate and the second semiconductor layer is relatively close to the carrier substrate. The high resistant ring wall surrounds the epitaxy structure and a width of the high resistant ring wall is greater than 5 ?m. The first electrode is disposed between the carrier substrate and the epitaxy structure. The second electrode is disposed at a side of the epitaxy structure away from the carrier substrate.
    Type: Application
    Filed: March 24, 2011
    Publication date: October 20, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Hung Kuo, Yi-Keng Fu, Suh-Fang Lin, Rong Xuan
  • Publication number: 20110003410
    Abstract: A method of manufacturing a light emitting diode element is provided. A first patterned semi-conductor layer, a patterned light emitting layer, and a second patterned semi-conductor layer are sequentially formed on an epitaxy substrate so as to form a plurality of epitaxy structures, wherein the first patterned semi-conductor layer has a thinner portion in a non-epitaxy area outside the epitaxy structures. A passivation layer covering the epitaxy structures and the thinner portion is formed. The passivation layer covering on the thinner portion is partially removed to form a patterned passivation layer. A patterned reflector is formed directly on each of the epitaxy structures. The epitaxy structures are bonded to a carrier substrate. A lift-off process is performed to separate the epitaxy structures from the epitaxy substrate. An electrode is formed on each of the epitaxy structures far from the patterned reflector.
    Type: Application
    Filed: December 29, 2009
    Publication date: January 6, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jenq-Dar Tsay, Suh-Fang Lin, Yu-Hsiang Chang, Yih-Der Guo, Sheng-Huei Kuo, Wei-Hung Kuo, Hsun-Chih Liu
  • Publication number: 20100090312
    Abstract: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second patterned arranged pillars. The nitride pillar layer is formed on the epitaxy substrate. A width of a cross-section of each of the second patterned arranged pillars is smaller than a width of a cross-section of each of the first patterned arranged pillars, and a distance among each of the second patterned arranged pillars is longer than a distance among each of the first patterned arranged pillars. Surfaces of the epitaxy substrate, the first patterned arranged pillars, and the second patterned arranged pillars are covered by the mask layer. The nitride semiconductor layer is formed on the nitride pillar layer.
    Type: Application
    Filed: September 14, 2009
    Publication date: April 15, 2010
    Applicant: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Suh-Fang Lin, Wei-Hung Kuo, Po-Chun Liu, Tung-Wei Chi, Chu-Li Chao, Jenq-Dar Tsay