Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A machine implemented method and system, including: receiving at a near real-time processor module, one or more tenant-specific business objects from a message handler module; receiving at the near real-time processor module, contextual data related to the received one or more tenant-specific business objects from a platform analytics module; forming at the near real-time processor module, one or more events by applying one or more pre-defined analytic models to the received contextual data and the received one or more tenant-specific business objects; receiving at a message publisher module, one or more events from the near real-time processor module; and transmitting the received one or more events to one or more subscribers for the one or more events.

Abstract: A protection circuit for a DMOS transistor comprises an anode circuit having a first heavily doped region of a first conductivity type (314) formed within and electrically connected to a first lightly doped region of the second conductivity type (310, 312). A cathode circuit having a plurality of third heavily doped regions of the first conductivity type (700) within a second heavily doped region of the second conductivity type (304). A first lead (202) is connected to each third heavily doped region (704) and connected to the second heavily doped region by at least three spaced apart connections (702) between every two third heavily doped regions. An SCR (400, 402) is connected between the anode circuit and the cathode circuit. The DMOS transistor has a drain (310, 312, 316) connected to the anode circuit and a source (304) connected to the cathode circuit.

Abstract: A protection circuit for a DMOS transistor comprises an anode circuit having a first heavily doped region of a first conductivity type (314) formed within and electrically connected to a first lightly doped region of the second conductivity type (310, 312). A cathode circuit having a plurality of third heavily doped regions of the first conductivity type (700) within a second heavily doped region of the second conductivity type (304). A first lead (202) is connected to each third heavily doped region (704) and connected to the second heavily doped region by at least three spaced apart connections (702) between every two third heavily doped regions. An SCR (400, 402) is connected between the anode circuit and the cathode circuit. The DMOS transistor has a drain (310, 312, 316) connected to the anode circuit and a source (304) connected to the cathode circuit.

Abstract: A method for forming a MOSFET transistor using a disposable gate process which has no need for a chemical mechanical polishing step to expose the disposable gate after deposition of the field dielectric. The field dielectric is deposited non-conformally by HDP-CVD over a disposable gate structure so that the disposable gate remains partially exposed. After deposition, the partially exposed disposable gate may then be removed by selective isotropic etch. In the space left by the removal of the disposable gate, the gate dielectric may be formed and the gate electrode may be deposited. Eliminating the need for exposure of the disposable gate by CMP eliminates the problem of polish rate dependence on gate pattern density.

Abstract: A counter-doped epitaxial silicon (doped opposite to the substrate type) is used to form the buried layer in a CMOS transistor, while maintaining an abrupt channel profile. Shallow source/drain junctions with abrupt source/drain profiles may be formed using raised (or elevated) source/drain design. The invention encompasses a transistor structure including a doped silicon substrate, and an oppositely-doped epitaxial silicon layer formed on the substrate. A gate is formed on the epitaxial layer, the gate defining a channel region in the epitaxial layer underneath the gate. A layer is formed on the epitaxial silicon layer on opposing sides of, and is electrically isolated from, the gate.

Abstract: A counter-doped epitaxial silicon (doped opposite to the substrate type) is used to form the buried layer in a CMOS transistor, while maintaining an abrupt channel profile. Shallow source/drain junctions with abrupt source/drain profiles may be formed using raised (or elevated) source/drain design. The invention encompasses a transistor structure including a doped silicon substrate, and an oppositely-doped epitaxial silicon layer formed on the substrate. A gate is formed on the epitaxial layer, the gate defining a channel region in the epitaxial layer underneath the gate. A layer is formed on the epitaxial silicon layer on opposing sides of, and is electrically isolated from, the gate.