Patents by Inventor Suhas A. Shetty

Suhas A. Shetty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hardware based parallel processing cores with multiple threads and multiple pipeline stages
    Patent number: 8059650
    Abstract: A pipelined out-of-order process and system for handling data packets in a network device. The process and system are scalable to support throughput in excess of 10 Gbps. The system includes a set of processing cores that offload the table look up operations and similar operations from the central processing unit. The central processing unit receives the requisite data needed for performing forwarding, routing, NAT, firewall maintenance and similar operation on data packets from the set of processing cores.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 15, 2011
    Assignee: Aruba Networks, Inc.
    Inventors: Suhas A. Shetty, De B. Vu
  • Hardware Based Parallel Processing Cores with Multiple Threads and Multiple Pipeline Stages
    Publication number: 20090109974
    Abstract: A pipelined out-of-order process and system for handling data packets in a network device. The process and system are scalable to support throughput in excess of 10 Gbps. The system includes a set of processing cores that offload the table look up operations and similar operations from the central processing unit. The central processing unit receives the requisite data needed for performing forwarding, routing, NAT, firewall maintenance and similar operation on data packets from the set of processing cores.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventors: Suhas A. Shetty, De B. Vu
  • Providing desired service policies to subscribers accessing internet
    Patent number: 6952728
    Abstract: An internet service node (ISN) enabling the provision of desired service policies to each subscriber. The ISN may contain multiple processor groups, with each subscriber being assigned to a processor group. The assigned processor group may be configured with the processing rules, which provide the service policies desired, by a subscriber. A port may determine the specific processor group to which received data is to be forwarded. A content addressable memory with masks for individual locations may be implemented to quickly determines the processor group to which received data is to be assigned to. Due to the features of the present invention, an ISN may be able to serve a large number of subscribers efficiently. The ISN may be used at the edge of an access network.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: October 4, 2005
    Assignee: Nortel Networks Limited
    Inventors: Anthony L. Alles, Arthur Lin, Shyam Prasad Pillalamarri, Kent H. Headrick, David A. Mullenex, Suhas A. Shetty
  • Backward compatibility for plug and play systems
    Patent number: 5634075
    Abstract: A device for use in a computer system, particularly a personal computer (PC) which provides compatibility for a proposed ISA plug and play (PNP) standard. The device of the present invention is also backward compatible with non-PNP (legacy) PCs. Upon power-up, a device may initialize using default traditional or specification (ISA) values for I/O address, IRQ and DMA channels. If PNP activity by the host PC is detected by the device, the device is disabled, and awaits activation and I/O address, IRQ and DMA channel assignments from a host PC. If no PNP activity by a host PC is detected, the device continues to operate using default traditional or specification (ISA) I/O address, IRQ and DMA channels. The device of the present invention may be installed in PNP or legacy type PCs without reconfiguring hardware (e.g., DIP switches, jumpers or the like) in the device or installing new firmware, operating system, or applications software in a host PC.
    Type: Grant
    Filed: January 11, 1995
    Date of Patent: May 27, 1997
    Assignee: Cirrus Logic, Inc.
    Inventors: Stephen A. Smith, Suhas A. Shetty, Daniel G. Bezzant