Abstract: A microelectronic device, e.g. an integrated circuit, includes first and second doped semiconductor regions over a semiconductor substrate. A semiconductor nanosheet layer is connected between the first and second semiconductor regions and has a bandgap greater than 1.5 eV. In some examples such a device is implemented as an LDMOS transistor. A method of forming the device includes forming a trench in a semiconductor substrate having a first conductivity type. A semiconductor nanosheet stack is formed within the trench, the stack including a semiconductor nanosheet layer and a sacrificial layer. Source and drain regions having an opposite second conductivity type are formed extending into the semiconductor nanosheet stack. The sacrificial layer between the source region and the drain region is removed, and the semiconductor nanosheet layer is annealed. A gate dielectric layer is formed on the semiconductor nanosheet layer, and a gate conductor is formed on the gate dielectric layer.

Abstract: Disclosed examples include microelectronic devices, e.g. Integrated circuits. One example includes a microelectronic device including a nanosheet lateral drain extended metal oxide semiconductor (LDMOS) transistor with source and drain regions having a first conductivity type extending into a semiconductor substrate having an opposite second conductivity type. A superlattice of alternating layers of nanosheets of a channel region and layers of gate conductor are separated by a gate dielectric, the superlattice extending between the source region and the drain region. A drain drift region of the first conductivity type extends under the drain region and a body region of the second type extends around the source region.