Patents by Inventor Sujay A. Phadke

Sujay A. Phadke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10144436
    Abstract: A ropeway vehicle transportation network includes pairs of ropeway cables on which ropeway vehicles travel the network stations. A plurality of network stations are line changer stations connected to at least two ropeway lines. Each line changer station includes shifter rails that rotate around a vertical axis. When a first ropeway vehicle is on the shifter rails, the shifter rails can be rotated to select on which set of the at least two ropeway lines the first ropeway vehicle will traverse when the first ropeway vehicle exits the shifter rails.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 4, 2018
    Inventor: Sujay A. Phadke
  • Patent number: 10059349
    Abstract: A ropeway vehicle is used within a ropeway vehicle transportation network. The ropeway vehicle includes at least one power drive wheel that is powered to move the ropeway vehicle along ropeway lines. At least one commutator wheel draws electrical power from ropeway cables that form the ropeway lines. A controller includes an on-board battery to back-up and supplement electrical power obtained from the ropeway cables.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: August 28, 2018
    Inventor: Sujay A. Phadke
  • Publication number: 20170313328
    Abstract: A ropeway vehicle is used within a ropeway vehicle transportation network. The ropeway vehicle includes at least one power drive wheel that is powered to move the ropeway vehicle along ropeway lines. At least one commutator wheel draws electrical power from ropeway cables that form the ropeway lines. A controller includes an on-board battery to back-up and supplement electrical power obtained from the ropeway cables.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventor: Sujay A. Phadke
  • Publication number: 20170313327
    Abstract: A ropeway vehicle transportation network includes pairs of ropeway cables on which ropeway vehicles travel the network stations. A plurality of network stations are line changer stations connected to at least two ropeway lines. Each line changer station includes shifter rails that rotate around a vertical axis. When a first ropeway vehicle is on the shifter rails, the shifter rails can be rotated to select on which set of the at least two ropeway lines the first ropeway vehicle will traverse when the first ropeway vehicle exits the shifter rails.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventor: Sujay A. Phadke
  • Patent number: 8341473
    Abstract: A microprocessor has a silicon area comprising a plurality of transistors implemented on the silicon area and a fault detection circuit occupying less than 20% of the silicon area and configured to detect faults at runtime in at least 80% of the plurality of transistors.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: December 25, 2012
    Assignee: The Regents of the University of Michigan
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke
  • Publication number: 20120011422
    Abstract: A method for detecting microprocessor hardware faults includes sending at least one input signal to a logic block within the microprocessor, collecting an output response to the input signal from the logic block, and determining whether the output response matches an expected output response of the logic block.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke
  • Patent number: 8051368
    Abstract: A method for detecting microprocessor hardware faults includes sending at least one input signal to a logic block within the microprocessor, collecting an output response to the input signal from the logic block, and determining whether the output response matches an expected output response of the logic block.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: November 1, 2011
    Assignee: The Regents of the Univeristy of Michigan
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke
  • Publication number: 20110214014
    Abstract: A method for detecting microprocessor hardware faults includes sending at least one input signal to a logic block within the microprocessor, collecting an output response to the input signal from the logic block, and determining whether the output response matches an expected output response of the logic block.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 1, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke
  • Patent number: 7966538
    Abstract: A method for detecting microprocessor hardware faults includes sending at least one input signal to a logic block within the microprocessor, collecting an output response to the input signal from the logic block, and determining whether the output response matches an expected output response of the logic block.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: June 21, 2011
    Assignee: The Regents of the University of Michigan
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke
  • Publication number: 20090138772
    Abstract: A method for detecting microprocessor hardware faults includes sending at least one input signal to a logic block within the microprocessor, collecting an output response to the input signal from the logic block, and determining whether the output response matches an expected output response of the logic block.
    Type: Application
    Filed: October 16, 2008
    Publication date: May 28, 2009
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Valeria Bertacco, Todd Michael Austin, Smitha Shyam, Kypros Constantinides, Sujay Phadke