Patents by Inventor Sujaya Srinivasan

Sujaya Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220195046
    Abstract: The disclosure provides a method for treating a subject afflicted with a tumor comprising administering to the subject a therapeutically effective amount of an anti-PD-1 antibody or antigen-binding portion thereof or an anti-PD-L1 antibody or anti-gen-binding portion thereof, wherein the subject is identified as having a high inflammatory gene signature score and a tumor that has a high tumor mutation burden (TMB) status. In some embodiments, the high inflammatory gene signature score is determined by measuring the expression of a panel of inflammatory genes in a tumor sample obtained from the subject, wherein the inflammatory gene panel comprises CD274 (PD-L1), CD8A, LAG3, and STAT1.
    Type: Application
    Filed: March 27, 2020
    Publication date: June 23, 2022
    Applicant: Bristol-Myers Squibb Company
    Inventors: Ming LEI, Nathan O. SIEMERS, Dimple PANDYA, Han CHANG, Teresa K. SANCHEZ, Christopher T. HARBISON, Peter M. SZABO, Zachary S. BOYD, Xiaozhong QIAN, Samy Abdel SACI, Tina C. YOUNG, Sujaya SRINIVASAN, Megan M. WIND-ROTOLO, Jasmine RIZZO, Donald G. JACKSON, Alice M. WALSH
  • Patent number: 10734117
    Abstract: Apparatuses (including devices and systems) and methods for determining if a patient will respond to a variety of cancer drugs.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: August 4, 2020
    Assignee: STRAND LIFE SCIENCES PRIVATE LIMITED
    Inventors: Vaijayanti Gupta, Manimala Sen, Satish Sankaran, Kalyanasundaram Subramanian, Ramesh Hariharan, Vamsi Veeramachaneni, Shanmukh Katragadda, Rohit Gupta, Radhakrishna Bettadapura, Anand Janakiraman, Arunabha Ghosh, Smita Agrawal, Sujaya Srinivasan, Bhupender Singh, Urvashi Bahadur, Shuba Krishna, Mahesh Nagarajan, Nimisha Gupta, Sudhir Borgonha
  • Publication number: 20190006048
    Abstract: Apparatuses (including devices and systems) and methods for determining if a patient will respond to a variety of cancer drugs.
    Type: Application
    Filed: March 2, 2016
    Publication date: January 3, 2019
    Inventors: Vaijayanti Gupta, Manimala Sen, Satish Sankaran, Kalyanasundaram Subramanian, Ramesh Hariharan, Vamsi Veeramachaneni, Shanmukh Katragadda, Rohit Gupta, Radhakrishna Bettadapura, Anand Janakiraman, Arunabha Ghosh, Smita Agrawal, Sujaya Srinivasan, Bhupender Singh, Urvashi Bahadur, Shuba Krishna, Mahesh Nagarajan, Preveen Rammoorthy, Harsha K. Rajashimha
  • Publication number: 20070143530
    Abstract: Method and apparatus for multi-block update using secure flash memory. An update package is received at a device containing update code to update existing code for the device stored in non-volatile memory. The received update code is stored in a first portion of the non-volatile memory, while pointers identifying storage locations of respective sets of the update code are written to a second portion of the non-volatile memory device. An update process is then performed with the update code by using the pointers to locate the respective sets and assembling the update code. Updated firmware and software images are then written to the non-volatile memory device to complete the update.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: John Rudelic, August Camber, Sujaya Srinivasan
  • Patent number: 7139199
    Abstract: A flash memory file system logically divides at least a portion of the flash memory into memory fragments and headers associated with the memory fragments. The flash memory file system also includes a transaction information structure in support of transacted operations. The transaction information structure includes fields to indicate whether a transaction has begun, whether commitment of the transaction has begun, and whether commitment of the transaction has been completed. File system operations may be rolled back if a transaction was interrupted.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: November 21, 2006
    Assignee: Intel Corporation
    Inventors: Sujaya Srinivasan, John C. Rudelic
  • Publication number: 20060004950
    Abstract: A flash memory file system includes fragments and headers. The headers have a reduced number of states.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Jeffrey Wang, John Rudelic, Sujaya Srinivasan, Sunil Atri
  • Publication number: 20060004951
    Abstract: Briefly, in accordance with an embodiment of the invention, a method and apparatus to alter code in a memory is provided. The method may include selecting a first block from a plurality of unmapped blocks in a nonvolatile memory to add or delete code in the nonvolatile memory. The apparatus may include a control circuit to select a first block from a plurality of unmapped blocks in a nonvolatile memory based on a cycle count of the first block to add or delete code in the nonvolatile memory. Other embodiments are described and claimed.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: John Rudelic, Sujaya Srinivasan
  • Publication number: 20050286306
    Abstract: A flash memory file system includes a transaction information structure in support of transacted operations. File system operations may be rolled back if a transaction was interrupted.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Inventors: Sujaya Srinivasan, John Rudelic
  • Publication number: 20050243640
    Abstract: In one embodiment of the present invention, a method includes storing a code object in a volume of an execute-in-place memory that includes at least one data object. In certain embodiments, the code object may be stored as a plurality of fragments. Further, the memory may support execution in place such that a processor may execute in place a first code fragment of a code object and execute in place a second code fragment of the code object from the memory, where the code fragments are non-contiguously stored in the memory.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 3, 2005
    Inventors: John Rudelic, Sujaya Srinivasan, Christopher Conley
  • Patent number: 6865122
    Abstract: In one embodiment of the present invention, a method includes initiating a reclaim operation on a dirty block of a block-alterable memory if less than a predetermined number of unmapped blocks exist in the block-alterable memory; and writing data into free space of a spare block of the block-alterable memory while the reclaim operation is occurring.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventor: Sujaya Srinivasan
  • Publication number: 20040205289
    Abstract: In one embodiment of the present invention, a method includes initiating a reclaim operation on a dirty block of a block-alterable memory if less than a predetermined number of unmapped blocks exist in the block-alterable memory; and writing data into free space of a spare block of the block-alterable memory while the reclaim operation is occurring.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 14, 2004
    Inventor: Sujaya Srinivasan
  • Patent number: 6549457
    Abstract: A multi-level cell memory may include at least two status bits. The status bits may be examined to determine whether or not a write operation was successful after a power loss occurs.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: April 15, 2003
    Assignee: Intel Corporation
    Inventors: Sujaya Srinivasan, David S. Dressler, John C. Rudelic, Richard E. Fackenthal