Patents by Inventor Sujeong KYUNG

Sujeong KYUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • 3D static RAM core cell having vertically stacked structure, and static RAM core cell assembly comprising same
    Patent number: 10692935
    Abstract: Disclosed is a 3D static RAM core cell having a vertically stacked structure, including six thin-film transistors each having a gate electrode, a source electrode and a drain electrode, the static RAM core cell including two switching thin-film transistors, each connected to a bit line and a word line to select recording and reading of data, and four data-storage thin-film transistors connected to a power supply voltage (Vdd) or a ground voltage (Vss) to record and read data, the static RAM core cell including a first transistor layer including two thin-film transistors selected from among the six thin-film transistors, a second transistor layer disposed on the first transistor layer and including two thin-film transistors selected from among the remaining four thin-film transistors, and a third transistor layer disposed on the second transistor layer and including the remaining two thin-film transistors, at least one electrode of the first transistor layer and at least one electrode of the second transistor
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: June 23, 2020
    Assignees: CENTER FOR ADVANCED SOFT ELECTRONICS, POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Jimin Kwon, Sungjune Jung, Jae Joon Kim, Kilwon Cho, Sujeong Kyung
  • 3D STATIC RAM CORE CELL HAVING VERTICALLY STACKED STRUCTURE, AND STATIC RAM CORE CELL ASSEMBLY COMPRISING SAME
    Publication number: 20190006424
    Abstract: Disclosed is a 3D static RAM core cell having a vertically stacked structure, including six thin-film transistors each having a gate electrode, a source electrode and a drain electrode, the static RAM core cell including two switching thin-film transistors, each connected to a bit line and a word line to select recording and reading of data, and four data-storage thin-film transistors connected to a power supply voltage (Vdd) or a ground voltage (Vss) to record and read data, the static RAM core cell including a first transistor layer including two thin-film transistors selected from among the six thin-film transistors, a second transistor layer disposed on the first transistor layer and including two thin-film transistors selected from among the remaining four thin-film transistors, and a third transistor layer disposed on the second transistor layer and including the remaining two thin-film transistors, at least one electrode of the first transistor layer and at least one electrode of the second transistor
    Type: Application
    Filed: December 28, 2016
    Publication date: January 3, 2019
    Inventors: Jimin KWON, Sungjune JUNG, Jae Joon KIM, Kilwon CHO, Sujeong KYUNG