Patents by Inventor Sujit Sharon

Sujit Sharon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chemical vapor deposition process
    Patent number: 6472321
    Abstract: The present invention relates to chemical vapor deposition processes related to the manufacture of integrated circuit devices. In accordance with one embodiment of the present invention, a process for forming an electrical contact to a silicon substrate is provided wherein a semiconductor wafer is positioned in a reaction chamber wherein the semiconductor wafer includes an insulating layer disposed over a semiconductor substrate, and the insulating layer defines a contact opening therein. The contact opening defines insulating side wall regions herein. The insulating side walls extend from an upper surface region of the insulating layer to an exposed semiconductor region of the semiconductor substrate. A set of reactants are introduced into the reaction chamber, RF plasma is generated in the vicinity of the semiconductor wafer, and the temperature and pressure of the reaction chamber is regulated.
    Type: Grant
    Filed: January 15, 2002
    Date of Patent: October 29, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Anand Srinivasan, Sujit Sharon, Raj Narasimhan
  • Chemical vapor deposition process
    Publication number: 20020058413
    Abstract: The present invention relates to chemical vapor deposition processes related to the manufacture of integrated circuit devices. In accordance with one embodiment of the present invention, a process for forming an electrical contact to a silicon substrate is provided wherein a semiconductor wafer is positioned in a reaction chamber wherein the semiconductor wafer includes an insulating layer disposed over a semiconductor substrate, and the insulating layer defines a contact opening therein. The contact opening defines insulating side wall regions therein. The insulating side walls extend from an upper surface region of the insulating layer to an exposed semiconductor region of the semiconductor substrate. A set of reactants are introduced into the reaction chamber, RF plasma is generated in the vicinity of the semiconductor wafer, and the temperature and pressure of the reaction chamber is regulated.
    Type: Application
    Filed: January 15, 2002
    Publication date: May 16, 2002
    Inventors: Anand Srinivasan, Sujit Sharon, Raj Narasimhan
  • Chemical vapor deposition process
    Patent number: 6365515
    Abstract: The present invention relates to chemical vapor deposition processes related to the manufacture of integrated circuit devices. In accordance with one embodiment of the present invention, a process for forming an electrical contact to a silicon substrate is provided wherein a semiconductor wafer is positioned in a reaction chamber wherein the semiconductor wafer includes an insulating layer disposed over a semiconductor substrate, and the insulating layer defines a contact opening therein. The contact opening defines insulating side wall regions therein. The insulating side walls extend from an upper surface region of the insulating layer to an exposed semiconductor region of the semiconductor substrate. A set of reactants are introduced into the reaction chamber, RF plasma is generated in the vicinity of the semiconductor wafer, and the temperature and pressure of the reaction chamber is regulated.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: April 2, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Anand Srinivasan, Sujit Sharon, Raj Narasimhan