Patents by Inventor Suk-Won Jung
Suk-Won Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8080481Abstract: The present invention provides a method for manufacturing a semiconductor nanowire device in mass production at a low cost without an additional complex nanowire alignment process or SOI substrate by forming a single crystal silicon nanowire with a simple process without forming an ultra fine pattern using an electron beam and transferring the nanowire separated from the substrate to another oxidation layer or insulation substrate. And also, the present invention suggests a method for simply manufacturing a nanowire device transferring the nanowire from a semiconductor substrate formed thereon the nanowire to another substrate formed thereon an insulation layer or the like.Type: GrantFiled: September 21, 2006Date of Patent: December 20, 2011Assignee: Korea Electronics Technology InstituteInventors: Kook-Nyung Lee, Woo Kyeong Seong, Suk-Won Jung, Won-hyo Kim
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Publication number: 20110261040Abstract: An information detection device includes: a plurality of light sensing units each configured to detect light; a plurality of sensor scanning drivers each configured to apply sensor scanning signals to the light sensing units; a sensing signal processor configured to receive position information detected by the light sensing units; a plurality of bias applying units each configured to apply bias voltages to the light sensing units; wherein each bias applying unit applies a different polarity of bias voltage.Type: ApplicationFiled: April 20, 2011Publication date: October 27, 2011Inventors: Sang-Youn HAN, Dong-Kwon KIM, Kyung-Sook JEON, Sung-Hoon YANG, Joo-Han KIM, Woong-Kwon KIM, Suk-Won JUNG, Byeong-Hoon CHO, Dae-Cheol KIM, Hui-Sung LEE, Ki-Hun JEONG, Seung-Mi SEO, Jung-Suk BANG, Kun-Wook HAN, Mi-Seon SEO
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Publication number: 20110168553Abstract: A sputtering system is disclosed.Type: ApplicationFiled: June 28, 2010Publication date: July 14, 2011Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.Inventors: Seung-Ho Choi, Suk-Won Jung, Young-Mook Choi, Hyun-Keun Song
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Publication number: 20110169000Abstract: A display substrate includes a first light blocking pattern formed on a base substrate, a first switching element, a second light blocking pattern formed on the base substrate, and a first sensing element. The first light blocking pattern is configured to block visible light and transmit infrared light. The first switching element includes a first semiconductor pattern, a first source electrode, a first drain electrode, and a first gate electrode. The second light blocking pattern is configured to block the visible light and transmit the infrared light. The first sensing element is configured to detect the infrared light, and includes a second semiconductor pattern, a second source electrode, a second drain electrode, and a second gate electrode.Type: ApplicationFiled: October 14, 2010Publication date: July 14, 2011Inventors: JUNG-SUK BANG, Byeong-Hoon Cho, Sung-Hoon Yang, Suk-Won Jung, Ki-Hun Jeong
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Publication number: 20110146575Abstract: An evaporation source is disclosed. In one embodiment, the evaporation source includes: i) a crucible being open on one side thereof and configured to store a deposition material and ii) a nozzle section located on the open side of the crucible and comprising a plurality of nozzles, wherein each of the nozzles has a sidewall configured to spray the deposition material therethrough, wherein the side wall has an inclined portion. The evaporation source also includes i) a heater configured to heat the crucible and ii) a housing configured to accommodate the crucible, the nozzle section, and the heater, wherein the nozzle section has a maximum spray angle less than about 60°.Type: ApplicationFiled: December 17, 2010Publication date: June 23, 2011Applicant: Samsung Mobile Display Co., Ltd.Inventors: Seung-Ho Choi, Suk-Won Jung, Seung-Ho Myoung, Cheol-Lae Roh
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Publication number: 20110147746Abstract: A touch screen substrate includes a base substrate, a first switching element and a first sensing element which senses infrared light. The first switching element includes a first switching gate electrode, a first active pattern disposed on the first switching gate electrode, a first switching source electrode disposed on the first active pattern and a first switching drain electrode disposed apart from the first switching source electrode. The first sensing element includes a first sensing drain electrode connected to the first switching source electrode, a first sensing source electrode disposed apart from the first sensing drain electrode, a second active pattern disposed below the first sensing drain electrode and the first sensing source electrode and including a first amorphous layer, a doped amorphous layer and a second amorphous layer, and a first sensing gate electrode disposed on the first sensing drain electrode and the first sensing source electrode.Type: ApplicationFiled: October 6, 2010Publication date: June 23, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woong-Kwon KIM, Jung-Suk BANG, Sung-Hoon YANG, Sang-Youn HAN, Suk-Won JUNG, Byeong-Hoon CHO, Dae-Cheol KIM, Ki-Hun JEONG, Kyung-Sook JEON, Seung-Mi SEO, Kun-Wook HAN, Mi-Seon SEO
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Publication number: 20110139357Abstract: A method of efficiently manufacturing a large-sized mask is disclosed. In one embodiment, the method includes: 1) providing a first mask member comprising i) a first pattern unit having a plurality of slits, ii) a first buffer unit spaced apart from the first pattern unit, and iii) a first bonding unit interconnecting the first pattern unit and the first buffer unit and 2) providing a second mask member comprising i) a second pattern unit having a plurality of slits, ii) a second buffer unit spaced apart from the second pattern unit, and iii) a second bonding unit interconnecting the second pattern unit and the second buffer unit. The method may further include contacting the first bonding unit and the second bonding unit; and connecting the first mask member to the second mask member while tensile forces are applied to the first mask member and the second mask member.Type: ApplicationFiled: December 15, 2010Publication date: June 16, 2011Applicant: Samsung Mobile Display Co. Ltd.Inventors: Choong-Ho Lee, Yoon-Chan Oh, Seung-Ho Choi, Suk-Won Jung, Jung-Soo Rhee
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Publication number: 20110129595Abstract: A deposition source includes a first deposition source section, the first deposition source section being configured to store a deposition material, a second deposition source section, the second deposition source section being separate from the first deposition source section and being configured to store the deposition material, the first and second deposition source sections being configured to alternately supply the deposition material while heating or cooling the deposition material, a feed section configured to receive evaporated deposition material from the first and second deposition source sections, and a nozzle section configured to receive the deposition material from the feed section.Type: ApplicationFiled: November 29, 2010Publication date: June 2, 2011Inventors: Suk-Won Jung, Seung-Ho Choi, Kang-Il Lee, Hyun-Keun Song, Cheol-Lae Roh
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Publication number: 20110114940Abstract: A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined.Type: ApplicationFiled: June 17, 2010Publication date: May 19, 2011Inventors: Do-Hyun Kim, Kyoung-Jae Chung, Seung-Ha Choi, Dong-Hoon Lee, Chang-Oh Jeong, Suk-Won Jung
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Publication number: 20110102385Abstract: An anisotropic conductive film includes a first thin film layer including concave portions, conductive balls arranged in the concave portions, insulating balls disposed on and between the conductive balls and each having a diameter smaller than the conductive balls, and a second thin film layer disposed covering the insulating balls. A display apparatus includes a pad part and a driving chip, which are electrically connected by the anisotropic conductive film.Type: ApplicationFiled: April 13, 2010Publication date: May 5, 2011Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: Suk-Won JUNG, Woongkwon KIM, Daecheol KIM, SungHoon YANG, Sang Youn HAN, Byeonghoon CHO, Ki-Hun JEONG, Kyung-Sook JEON, jung suk BANG
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Publication number: 20110090420Abstract: A sensor array substrate, a display device including the sensor array substrate, and a method of manufacturing the sensor array substrate are provided. The sensor array substrate includes a substrate, a first sensor formed on a first pixel area of the substrate and configured to detect light, an overcoat layer formed on the first sensor, and a shield layer formed over the overcoat layer, wherein the shield layer overlaps the first sensor.Type: ApplicationFiled: October 5, 2010Publication date: April 21, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Woong-Kwon KIM, Dae-Cheol KIM, Dong-Kwon KIM, Ki-Hun JEONG, Sung-Hoon YANG, Sang-Youn HAN, Suk-Won JUNG, Byeong-Hoon CHO, Kyung-Sook JEON, Seung-Mi SEO, Jung-Suk BANG, Mi-Seon SEO
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Publication number: 20110057189Abstract: A display device includes a lower panel including a lower substrate and a pixel transistor formed on the lower substrate; and an upper panel facing the lower panel, and including an upper substrate, a sensing transistor formed on the upper substrate, and a readout transistor connected to the sensing transistor and transmitting a signal. The readout transistor includes a first lower gate electrode formed on the upper substrate, a first semiconductor layer formed on the first lower gate electrode and overlaps the first gate electrode, and a first source electrode and a first drain electrode disposed on the first semiconductor layer.Type: ApplicationFiled: April 16, 2010Publication date: March 10, 2011Applicant: Samsung Electronics Co., Ltd.Inventors: Ki-Hun JEONG, Byeong-Hoon Cho, Jung-Suk Bang, Sang-Youn Han, Woong-Kwon Kim, Sung-Hoon Yang, Suk Won Jung, Dae-Cheol Kim, Kyung-Sook Jeon, Seung Mi Seo
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Patent number: 7473639Abstract: Disclosed is a method of forming a dual damascene pattern. The method can include forming a first etch stop layer, a first dielectric layer, a second etch stop layer, a second dielectric layer and a cap insulating layer on a substrate, forming a preliminary via hole exposing a part of the first etch stop layer by patterning the insulating layer structure, and forming a sacrificial layer pattern in the preliminary via hole. After forming a mask pattern on the cap insulating layer, a trench is formed by patterning the cap insulating layer, the second dielectric layer and a part of the sacrificial layer. The sacrificial layer pattern and the mask pattern are removed in-situ through an ashing process, thereby forming a via hole.Type: GrantFiled: October 11, 2006Date of Patent: January 6, 2009Assignee: Dongbu Electronics Co., Ltd.Inventor: Suk Won Jung
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Patent number: 7452806Abstract: Disclosed herein is a method of forming an inductor in a semiconductor device, the method including forming an etching-prevention film, a first interlayer insulating film, and a first hard mask film over a silicon semiconductor substrate in this sequence; selectively etching the first hard mask film to form a hole; forming a second interlayer insulating film over the first hard mask film; forming a second hard mask film over the second interlayer insulating film; forming a photoresist pattern having a trench forming opening over the second hard mask film; removing a part of the second hard mask film and a part of the second interlayer insulating film by using the photoresist pattern as an etching mask, to form a first trench in the second interlayer insulating film; removing the photoresist pattern and polymers produced in the first trench by ashing and cleaning process; etching the second interlayer insulating film by using the second hard mask film as an etching mask until the first hard mask film is exposeType: GrantFiled: July 30, 2007Date of Patent: November 18, 2008Assignee: Dongbu HiTek Co., Ltd.Inventors: Sang Il Hwang, Suk Won Jung
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Patent number: 7298452Abstract: A flexible substrate, which has a photosensitive agent applied thereon, is continuously supplied from a supply unit to a guide unit where light is irradiated from a light source on a section of the substrate. A mask is positioned between the substrate and the light source so that the light from the light source selectively subjects the section of the substrate to exposure. Hence, it is possible to form a pattern having a continuous slanted structure for a large-area display panel.Type: GrantFiled: November 19, 2004Date of Patent: November 20, 2007Assignees: LG Electronics Inc., Korea Electronics Technology InstituteInventors: Suk-Ho Park, Young-Jun Choi, Hyeon-Seok Oh, Jae-Ha Lim, Suk-Won Jung
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Publication number: 20070105321Abstract: The present invention provides a method for manufacturing a semiconductor nanowire device in mass production at a low cost without an additional complex nanowire alignment process or SOI substrate by forming a single crystal silicon nanowire with a simple process without forming an ultra fine pattern using an electron beam and transferring the nanowire separated from the substrate to another oxidation layer or insulation substrate. And also, the present invention suggests a method for simply manufacturing a nanowire device transferring the nanowire from a semiconductor substrate formed thereon the nanowire to another substrate formed thereon an insulation layer or the like.Type: ApplicationFiled: September 21, 2006Publication date: May 10, 2007Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTEInventors: Kook-Nyung LEE, Woo Kyeong SEONG, Suk-Won JUNG, Won-hyo KIM
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Patent number: 7160500Abstract: The present invention relates to a method of fabricating a micro device, comprising the steps of pressing an upper mold formed with a plurality of recesses for molding a plurality of rods and a lower mold formed with a seat recess for molding a plate supporting the plurality of rods against each other; injecting ceramic material mixed with a polymer into the mold; releasing a resultant ceramic molding mixed with the polymer from the molds; removing the polymer from the ceramic molding by burning out or melting away the polymer; sintering the ceramic molding; filling a polymer into spaces between the plurality of rods of the sintered ceramic molding so that the top surfaces of the plurality of rods are exposed to the outside; and removing the plate through a polishing process so that bottom surfaces of the plurality of rods are exposed to the outside.Type: GrantFiled: October 16, 2002Date of Patent: January 9, 2007Assignee: Korea Electronics Technology InstituteInventors: Joon-Shik Park, Soon-Sup Park, Suk-Won Jung, Jin-Woo Cho
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Publication number: 20050151944Abstract: A flexible substrate, which has a photosensitive agent applied thereon, is continuously supplied from a supply unit to a guide unit where light is irradiated from a light source on a section of the substrate. A mask is positioned between the substrate and the light source so that the light from the light source selectively subjects the section of the substrate to exposure. Hence, it is possible to form a pattern having a continuous slanted structure for a large-area display panel.Type: ApplicationFiled: November 19, 2004Publication date: July 14, 2005Applicants: LG Electronics Inc., Korea Electronics Technology InstituteInventors: Suk-Ho Park, Young-Jun Choi, Hyeon-Seok Oh, Jae-Ha Lim, Suk-Won Jung
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Patent number: 6558878Abstract: Disclosed is a microlens manufacturing method which comprises the step of: positioning a X-ray mask for manufacturing the microlens on an substrate on which a sensitive film is formed, and arranging a rotation axis of the substrate and a central axis of the X-ray mask; applying X-rays to the X-ray mask to expose the sensitive film while fixing the X-ray mask and rotating the substrate; developing the sensitive film to form the microlens; performing an electroplating process on the plating base to form a metal layer; and separating the metal layer from the sensitive film structure and combining the metal layer with a mold frame for injection molding the microlens and manufacturing an injection mold.Type: GrantFiled: June 1, 2000Date of Patent: May 6, 2003Assignee: Korea Electronics Technology InstituteInventors: Hyo-Derk Park, Suk-Won Jung, Kwang-Bum Park, In-Hoe Kim, Hyun-Chan Moon, Kun-Nyun Kim, Soon-Sup Park, Sang-Mo Shin
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Publication number: 20030080478Abstract: The present invention relates to a method of fabricating a micro device and a method for manufacturing a mold for molding the micro device.Type: ApplicationFiled: October 16, 2002Publication date: May 1, 2003Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTEInventors: Joon-Shik Park, Soon-Sup Park, Suk-Won Jung, Jin-Woo Cho