Abstract: A semiconductor device includes a back interlayer insulating film; a plurality of first channel patterns on the back interlayer insulating film and spaced apart from each other in a vertical direction; a plurality of second channel patterns on the back interlayer insulating film and spaced apart from each other in the vertical direction; a source/drain pattern between the first channel patterns and the second channel patterns; and a source/drain contact connected to the source/drain pattern, wherein the source/drain pattern includes a first layer which comes into contact with the first channel patterns and the second channel patterns, a second layer on or below the first layer, and a third layer on or above the second layer, wherein a width of the first layer in the vertical direction decreases and then increases, along a direction from the first channel patterns to the second channel patterns.

Abstract: A semiconductor device includes a substrate, a first transistor disposed on the substrate and including first channel patterns stacked in a vertical direction, a first gate electrode surrounding each first channel pattern, and a first internal spacer on a side surface of the first gate electrode, and a second transistor stacked on the first transistor and comprising second channel patterns stacked in the vertical direction, a second gate electrode surrounding each second channel pattern, and a second internal spacer on a side surface of the second gate electrode. The first channel patterns and the second channel patterns include a two-dimensional material layer. A material of the first internal spacer is different from a material of the second internal spacer.

Abstract: Provided is a semiconductor device including a plurality of active patterns spaced apart in a first direction intersecting with a surface of a substrate, a gate electrode extending in a second direction intersecting with the first direction and surrounding the plurality of active patterns, and a source/drain pattern spaced apart from the gate electrode in a third direction intersecting with the first direction and the second direction and connected to the plurality of active patterns in the third direction, and each of the plurality of active patterns includes a contact part, at least a portion of which is inserted within the source/drain pattern, and a connection part extending from the contact part away from the source/drain pattern in the third direction.

Abstract: A display apparatus including a light-emitting device is provided. The light-emitting device may include a first electrode, a light-emitting layer and a second electrode, which are sequentially stacked on a display area of a device substrate. An over-coat layer may be disposed between the device substrate and the light-emitting device. The light-emitting layer, the second electrode and the over-coat layer may extend on a bezel area of the device substrate. A moisture blocking hole penetrating the over-coat layer of the bezel area may include a first blocking side having a positive tapered shape and a second blocking side having a negative tapered shape. A lower passivation layer between the device substrate and the over-coat layer may include a lower penetrating hole disposed between the first blocking side and the second blocking side. A reflective pattern overlapping with the second blocking side may be disposed between the device substrate and the lower passivation layer.

Abstract: A two-dimensional (2D) material growth substrate includes a semiconductor substrate having a first surface and a second surface opposite to the first surface; a strain control buffer layer formed on the second surface of the semiconductor substrate; a surface protective layer formed on the first surface of the semiconductor substrate; and a 2D material layer formed on the surface protective layer. The 2D material layer is configured to generate one of a tensile strain and a compressive strain. The semiconductor substrate and the strain control buffer layer include materials having different thermal expansion coefficients, and a combined thermal expansion coefficient of the semiconductor substrate and the strain control buffer layer is substantially similar to a thermal expansion coefficient of the 2D material layer.

Abstract: A display apparatus including a light-emitting device is disclosed. The light-emitting device is on a display area of a device substrate. An overcoat layer is disposed between the device substrate and the light-emitting device. The overcoat layer extends on a bezel area of the device substrate. A heating signal wiring is between the bezel area of the device substrate and the overcoat layer. A heating pattern electrically connected to the heating signal wiring is on the over-coat layer of the bezel area. A surface of the heating pattern opposite to the device substrate may be in contact with an adhesive layer covering the light-emitting device. Thus, in the display apparatus, the damage of the light-emitting device due to external moisture may be prevented or at least reduced.

Abstract: A semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on the substrate, a first plurality of upper nanosheets stacked on the active pattern to be spaced apart from each other in a vertical direction, a second plurality of upper nanosheets stacked on the active pattern to be spaced apart from each other in the vertical direction, a first gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a second gate electrode extending in the second horizontal direction on the active pattern, an upper source/drain region between the first plurality of upper nanosheets and the second plurality of upper nanosheets, and a source/drain contact extending to the upper source/drain region and electrically coupled with the upper source/drain region.

Abstract: A semiconductor device includes: a lower stack including a plurality of lower gate lines and a plurality of lower nanosheets that are alternately stacked on a substrate; an upper stack including a plurality of upper gate lines and a plurality of upper nanosheets that are alternately stacked on the lower stack; a lower source/drain region disposed on a side surface of the lower stack; and an upper source/drain region disposed on the lower source/drain region and adjacent to a side surface of the upper stack, wherein the upper source/drain region includes a side impurity layer and an upper center impurity layer, wherein the side impurity layer extends in a vertical direction along the side surface of the upper stack, and the upper center impurity layer is disposed on an inner side of the side impurity layer, and a first surface of the upper center impurity layer has a curved shape.

Abstract: A semiconductor device includes a semiconductor pattern protruding in a direction perpendicular to a top surface of a substrate and having an inner surface and an outer surface that stand opposite to each other in a first direction parallel to the top surface of the substrate, a gate dielectric layer covering the inner surface and the outer surface of the semiconductor pattern and extending onto a top surface of the semiconductor pattern, a gate electrode on the gate dielectric layer and covering the outer surface, the top surface, and the inner surface of the semiconductor pattern, and an auxiliary pattern between the gate dielectric layer and the inner surface of the semiconductor pattern. The outer surface of the semiconductor pattern is in contact with the gate dielectric layer. The inner surface of the semiconductor pattern is in contact with the auxiliary pattern.

Abstract: A semiconductor device may include a substrate including an active pattern, first channel layers spaced apart on the active pattern in a vertical direction, a first gate structure surrounding the first channel layers, first source/drain patterns on both sides of the first gate structure and connected to the first channel layers, first internal spacers between the first gate structure and the first source/drain patterns, second channel layers spaced apart in the vertical direction on the first channel layers, a second gate structure on the first gate structure and surrounding the second channel layers, second source/drain patterns on both sides of the second gate structure and connected to the second channel layers, and second internal spacers between the second gate structure and the second source/drain patterns. The first and second internal spacers may have different shapes. The vertical direction may be perpendicular to an upper surface of the substrate.

Abstract: A display apparatus including a light-emitting device is provided. The light-emitting device is disposed on a display area of a device substrate. An over-coat layer between the device substrate and the light-emitting device extends onto a bezel area. A moisture-blocking hole penetrating the over-coat layer is disposed on the bezel area. At least a portion of the moisture-blocking hole is filled by an encapsulating element disposed on the light-emitting device. A front adhesive layer covering the encapsulating element may attach an encapsulation substrate to the device substrate in which the light-emitting device and the encapsulating element are formed. A variable adhesive layer is disposed between the encapsulating element and the front adhesive layer and/or the over-coat layer and the front adhesive layer of the bezel area. Thus, in the display apparatus, the penetration of external moisture may be blocked, and the process efficiency and the productivity may be improved.

Abstract: An electroluminescent display device according to an exemplary embodiment of the present disclosure includes a display panel divided into a display area and a non-display area, a planarization layer and a bank extended to the non-display area of the display panel, an organic layer and a cathode disposed on the bank and extended to the non-display area of the display panel, a trench which is disposed in the non-display area outside the display area and from which the cathode, the organic layer, the bank and the planarization layer are removed; an under-cut structure which is disposed within the trench and composed of the bank and the planarization layer and in which the planarization layer retreats inwards from an end of the bank to generate an under-cut and an adhesive layer and an encapsulation substrate disposed on the cathode. Thus, reliability can be improved and a bezel width can be reduced.

Abstract: A semiconductor memory device includes a contact pad that fills a recess at an upper end of a channel region and is in contact with a contact plug, wherein sidewalls of the contact pad are spaced apart from a back gate dielectric film and a gate dielectric film with the channel region in between at a vertical level lower than a first vertical level at which an uppermost surface of the channel region is positioned.

Abstract: A method of manufacturing a semiconductor memory device includes forming, on a substrate, a channel structure including a channel pattern; forming, on the channel structure, a silicide material layer including an alloy of a semiconductor material and a metal including a eutectic composition; forming a sacrificial semiconductor layer between the channel structure and the silicide material layer and forming a mold layer surrounding the sacrificial semiconductor layer; forming a capacitor hole by removing the sacrificial semiconductor layer; forming a lower electrode that fills the capacitor hole; removing the mold layer; forming a capacitor dielectric layer that covers a surface of the lower electrode; and forming an upper electrode that covers the capacitor dielectric layer.

Abstract: A semiconductor device of the technical idea of the inventive concept includes a first transistor including a first channel region extending in a first direction and a first source/drain region contacting the first channel region, a second transistor including a second channel region on the first transistor and spaced apart from the first transistor in a second direction perpendicular to the first direction and extending in the first direction and a second source/drain region contacting the second channel region, a dummy layer beneath the first transistor, a protective layer beneath the dummy layer and including an indented portion that is indented in the first direction, and a spacer on the indented portion.

Abstract: A semiconductor device includes a substrate, a first device region on the substrate, a second device region on the substrate and spaced apart from the first device region in a first direction, a first dummy region between the first device region and the second device region, and an insulating pattern in the first device region, the second device region and the first dummy region, where the first dummy region includes a seed pattern on the insulating pattern, and a seed mask pattern at least partially covering a top surface of the seed pattern and extending from the top surface of the seed pattern along a first sidewall of the seed pattern, where the insulating pattern in the first dummy region is on the substrate, and where the seed pattern includes a transition metal dichalcogenide.

Abstract: A display apparatus including a light-emitting device is provided. The light-emitting device is disposed on a display area of a device substrate. An over-coat layer between the device substrate and the light-emitting device extends onto a bezel area. A moisture-blocking hole penetrating the over-coat layer is disposed on the bezel area. At least a portion of the moisture-blocking hole is filled by an encapsulating element disposed on the light-emitting device. A front adhesive layer covering the encapsulating element may attach an encapsulation substrate to the device substrate in which the light-emitting device and the encapsulating element are formed. A variable adhesive layer is disposed between the encapsulating element and the front adhesive layer and/or the over-coat layer and the front adhesive layer of the bezel area. Thus, in the display apparatus, the penetration of external moisture may be blocked, and the process efficiency and the productivity may be improved.

Abstract: An electroluminescent display device includes a display panel having a display area and a non-display area. A planarization layer is over the non-display area. A bank is on the planarization layer. An organic layer and a cathode are on the bank. A trench pattern extends through the cathode and the organic layer. An adhesive layer and an encapsulation substrate are disposed over the cathode. The adhesive layer covers the trench pattern. The adhesive layer is effective to slow a rate of moisture penetration to a side surface of the non-display area, allowing for improvements in reliability and a reduction in bezel width.

Abstract: Discussed is a display device capable of improving heat dissipation performance. The display device includes a display panel, and a back cover to support the display panel, wherein the back cover includes a first back cover stacked on the display panel and a second back cover stacked on the first back cover, where the back cover has thermal conductivity.

Abstract: A semiconductor device includes a lower pattern extending in a first direction, a plurality of wire patterns spaced apart from the lower pattern in a second direction on the lower pattern, and a gate electrode surrounding the plurality of wire patterns and extending in a third direction, on the lower pattern. Each of the plurality of wire patterns includes a transition metal dichalcogenide (TMD) material. Each of the plurality of wire patterns includes a pair of first areas protruding from sidewalls of the gate electrode in the first direction and a second area between the first areas. A phase of the first area is different from a phase of the second area.