Patents by Inventor Suk-Gi Choi

Suk-Gi Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128502
    Abstract: An embodiment solid electrolyte includes a first compound and a second compound. The first compound is represented by a first chemical formula Li7-aPS6-a(X11-bX2b)a, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, and wherein 0<a?2 and 0<b<1, and the second compound is represented by a second chemical formula Li7-cP1-2dMdS6-c-3d(X11-eX2e)c, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, wherein M represents Ge, Si, Sn, or any combination thereof, and wherein 0<c?2, 0<d<0.5, and 0<e<1.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 18, 2024
    Inventors: Sa Heum Kim, Yong Jun Jang, Yong Gu Kim, Sung Man Cho, Sun Ho Choi, Seong Hyeon Choi, Kyu Sung Park, Young Gyoon Ryu, Suk Gi Hong, Pil Sang Yun, Myeong Ju Ha, Hyun Beom Kim, Hwi Chul Yang
  • Patent number: 5173760
    Abstract: A method for fabricating a BiCMOS device to achieve a maximum performance through a minimum processing steps, in which the BiCMOS device comprises high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. Said method comprises a plurality of fabrication steps including ion-implantation, formation of thin film oxide layer, deposition of nitride layer, etching of oxide layer, formation of windows and others, alternately or/and sequentially in a single chip substrate.
    Type: Grant
    Filed: March 26, 1990
    Date of Patent: December 22, 1992
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Ki Min, Chang-Won Kahng, Uk-Rae Cho, Jong-Mil Youn, Suk-Gi Choi
  • Patent number: 4912055
    Abstract: A method for fabricating a BiCMOS device to achieve a maximum performance through a of minimum processing steps, in which the BiCMOS device is exemplary for its high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. The method includes a plurality of fabrication steps including ion-implantation, formation of a thin film oxide layer, deposition of a nitride layer, etching of the oxide layer, formation of windows and others, alternately and/or sequentially in a single chip substrate.
    Type: Grant
    Filed: October 31, 1988
    Date of Patent: March 27, 1990
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Sung-Ki Min, Chang-Won Kahng, Uk-Rae Cho, Jong-Mil Youn, Suk-Gi Choi