Patents by Inventor Sukha R. Ghosh

Sukha R. Ghosh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interface circuit for providing a computer logic circuit with first and second voltages and an associated method
    Patent number: 7375442
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: May 20, 2008
    Assignee: LSI Logic Corporation
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Interface circuit for providing a computer logic circuit with first and second voltages and an associated method
    Patent number: 7256517
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: August 14, 2007
    Assignee: LSI Corporation
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Interface circuit for providing a computer logic circuit with first and second voltages and an associated method
    Publication number: 20040178682
    Abstract: A universal interface circuit and an associated method are provided that can supply a computer logic circuit, such as the components mounted upon an adapter card, with first and second inputs having first and second predetermined voltage levels, respectively, based upon power drawn from both first and second supply voltages. The interface circuit typically includes a first power supply circuit for providing the first input having the first predetermined voltage level in response to the first supply voltage. Additionally, the interface surface includes a regulator for generating an output having the second predetermined voltage level in response to the first supply voltage. The interface circuit further includes a second power supply circuit for providing an output that also has the second predetermined voltage level, albeit in response to the second supply voltage.
    Type: Application
    Filed: August 23, 2001
    Publication date: September 16, 2004
    Applicant: American Megatrends, Inc.
    Inventors: Charles Clark Jablonski, Stephen Scott Piper, Sukha R. Ghosh
  • Transportable memory apparatus and associated methods of initializing a computer system having same
    Patent number: 6567899
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: May 20, 2003
    Assignee: LSI Logic Corporation
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal
  • Transportable memory apparatus and associated methods of initializing a computer system having the same
    Patent number: 6557077
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: April 29, 2003
    Assignee: LSI Logic Corporation
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal
  • Transportable memory apparatus and associated methods of initializing a computer system having same
    Publication number: 20020194440
    Abstract: A transportable memory apparatus including cache memory and a backup battery is provided that is capable of being removed from a first computer system and installed within a second computer system. The transportable memory apparatus includes a control bus that provides appropriate signals such that the presence and status of the transportable memory apparatus can be detected in order to permit the computer system that includes the transportable memory apparatus to be appropriately initialized. As such, methods for initializing a computer system that may include a transportable memory apparatus are also provided.
    Type: Application
    Filed: July 1, 2002
    Publication date: December 19, 2002
    Inventors: Sukha R. Ghosh, Paresh Chatterjee, Stephen Scott Piper, Marc C. Karasek, Basavaraj Gurupadappa Hallyal