Patents by Inventor Suk Hee Han
Suk Hee Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11930691Abstract: An apparatus for manufacturing an organic material includes an outer tube including an internal accommodating space, and at least one loading inner tube and at least one collecting inner tube disposed in the accommodation space, the loading inner tube including a mesh boat disposed in a first direction in which the loading inner tube extends.Type: GrantFiled: September 5, 2019Date of Patent: March 12, 2024Assignee: Samsung Display Co., Ltd.Inventors: Keun Hee Han, Jong Woo Lee, Myung Ki Lee, Suk Ki, Jeong Hyeon Son
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Patent number: 11393975Abstract: Provided is a method of a generating a skyrmion. The method includes a step of preparing a magnetic multilayer system and a step of generating a skyrmion at a temperature of 400° C. or higher by adjusting the magnetic anisotropy value and the magnetization value of the magnetic multilayer system.Type: GrantFiled: November 20, 2020Date of Patent: July 19, 2022Inventors: Jun Woo Choi, Hee Young Kwon, Byoung Chul Min, Suk Hee Han, Hye Jung Chang
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Publication number: 20220020921Abstract: Provided is a method of a generating a skyrmion. The method includes a step of preparing a magnetic multilayer system and a step of generating a skyrmion at a temperature of 400° C. or higher by adjusting the magnetic anisotropy value and the magnetization value of the magnetic multilayer system.Type: ApplicationFiled: November 20, 2020Publication date: January 20, 2022Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jun Woo CHOI, Hee Young KWON, Byoung Chul MIN, Suk Hee HAN, Hye Jung CHANG
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Patent number: 10622490Abstract: Provided is a reconfigurable logic device using an electrochemical potential. The device includes first and second semiconductor channels, where an effective magnetic field direction of a channel is controlled by a current direction and which are spaced apart from each other, a first ferromagnetic gate contacting the first semiconductor channel and a second ferromagnetic gate contacting the second semiconductor channel, where a magnetization direction is controlled by a gate voltage, and a control unit configured to calculate a difference value corresponding to a difference between a first determination value and a second determination value, and compare the difference value with a reference value to determine an output value.Type: GrantFiled: March 14, 2018Date of Patent: April 14, 2020Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Hyung Jun Kim, Cha Un Jang, Joon Yeon Chang, Suk Hee Han, Joo Hyeon Lee
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Publication number: 20190035943Abstract: Provided is a reconfigurable logic device using an electrochemical potential. The device includes first and second semiconductor channels, where an effective magnetic field direction of a channel is controlled by a current direction and which are spaced apart from each other, a first ferromagnetic gate contacting the first semiconductor channel and a second ferromagnetic gate contacting the second semiconductor channel, where a magnetization direction is controlled by a gate voltage, and a control unit configured to calculate a difference value corresponding to a difference between a first determination value and a second determination value, and compare the difference value with a reference value to determine an output value.Type: ApplicationFiled: March 14, 2018Publication date: January 31, 2019Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyun Cheol KOO, Hyung Jun KIM, Cha Un JANG, Joon Yeon CHANG, Suk Hee HAN, Joo Hyeon LEE
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Patent number: 10014396Abstract: A spin control electronic device operable at room temperature according to an embodiment of the present invention includes a transfer channel that includes a low-dimensional nanostructure, the nanostructure being located on a substrate, having an elongate shape in a first direction and having a cross section, cut along a second direction that is perpendicular to the first direction, in the shape of a triangle; a source electrode located on the substrate and intersecting the transfer channel, the source electrode covering part of the transfer channel; and a drain electrode spaced apart from the source electrode on the substrate, the drain electrode intersecting the transfer channel and covering part of the transfer channel.Type: GrantFiled: April 14, 2017Date of Patent: July 3, 2018Assignee: Korea Institute of Science and TechnologyInventors: Joon Yeon Chang, Tae Eon Park, Byoung Chul Min, Hyun Cheol Koo, Suk Hee Han
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Publication number: 20170301778Abstract: A spin control electronic device operable at room temperature according to an embodiment of the present invention includes a transfer channel that includes a low-dimensional nanostructure, the nanostructure being located on a substrate, having an elongate shape in a first direction and having a cross section, cut along a second direction that is perpendicular to the first direction, in the shape of a triangle; a source electrode located on the substrate and intersecting the transfer channel, the source electrode covering part of the transfer channel; and a drain electrode spaced apart from the source electrode on the substrate, the drain electrode intersecting the transfer channel and covering part of the transfer channel.Type: ApplicationFiled: April 14, 2017Publication date: October 19, 2017Applicant: Korea Institute of Science and TechnologyInventors: Joon Yeon CHANG, Tae Eon PARK, Byoung Chul MIN, Hyun Cheol KOO, Suk Hee HAN
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Publication number: 20170018625Abstract: Disclosed is a transistor including a topological insulator. The transistor includes: a substrate; a topological insulator provided on the substrate; a drain electrode provided on the topological insulator; a source electrode separated from the drain electrode, provided on the topological insulator, and including a ferromagnetic substance; a tunnel junction layer provided on the source electrode; and a gate electrode provided on the tunnel junction layer. A spin direction of the topological insulator is fixed by a current flowing to a surface thereof, and a spin direction of the source electrode is changed to a predetermined direction by a voltage applied to the gate electrode.Type: ApplicationFiled: June 27, 2016Publication date: January 19, 2017Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyun Cheol KOO, Hyung-jun KIM, Jun Woo CHOI, Joonyeon CHANG, Suk Hee HAN, Chaun JANG, Youn Ho PARK
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Patent number: 9337272Abstract: A spin transistor includes: an input part that is made of a material exhibiting a spin Hall effect and configured to transfer electrons with a predetermined direction of spin to a connecting part; and the connecting part that receives the electrons with the predetermined direction of spin from the input part, rotates the spin of the electrons in accordance with a gate voltage applied to the gate electrode, and transfers the electrons to the output part.Type: GrantFiled: October 7, 2014Date of Patent: May 10, 2016Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Hyung-jun Kim, Joonyeon Chang, Won Young Choi, Suk Hee Han
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Publication number: 20150333123Abstract: A spin transistor includes: an input part that is made of a material exhibiting a spin Hall effect and configured to transfer electrons with a predetermined direction of spin to a connecting part; and the connecting part that receives the electrons with the predetermined direction of spin from the input part, rotates the spin of the electrons in accordance with a gate voltage applied to the gate electrode, and transfers the electrons to the output part.Type: ApplicationFiled: October 7, 2014Publication date: November 19, 2015Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyun Cheol KOO, Hyung-jun KIM, Joonyeon CHANG, Won Young CHOI, Suk Hee HAN
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Patent number: 9099328Abstract: A complementary device including a gate electrode, a channel, a source electrode connected to the gate electrode and the channel, and a first drain electrode and a second drain electrode connected to the gate electrode and the channel is provided. The first/second drain electrode is formed so that, in accordance with a voltage applied to the gate electrode, electron spins injected into the source electrode are moved from the source electrode to the first/second drain electrode through the channel while rotating in a first/second direction. Directions of the electron spins that reach the first drain electrode and the second drain electrode are opposite to each other.Type: GrantFiled: October 11, 2013Date of Patent: August 4, 2015Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyun Cheol Koo, Hyung-Jun Kim, Joon Yeon Chang, Jun Woo Choi, Suk Hee Han
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Publication number: 20140264514Abstract: A complementary device including a gate electrode, a channel, a source electrode connected to the gate electrode and the channel, and a first drain electrode and a second drain electrode connected to the gate electrode and the channel is provided. The first/second drain electrode is formed so that, in accordance with a voltage applied to the gate electrode, electron spins injected into the source electrode are moved from the source electrode to the first/second drain electrode through the channel while rotating in a first/second direction. Directions of the electron spins that reach the first drain electrode and the second drain electrode are opposite to each other.Type: ApplicationFiled: October 11, 2013Publication date: September 18, 2014Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Hyun Cheol KOO, Hyung-Jun KIM, Joon Yeon CHANG, Jun Woo CHOI, Suk Hee HAN
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Patent number: 8775139Abstract: A method for simulating fluid flow includes: discretizing a space in which a fluid flows into a regular lattice; assuming that fluid particles repetitively move and collide in the lattice; deriving a univariate polynomial equation by comparing the n-th (n is a non-negative integer) order momentum of velocity between the Maxwell-Boltzmann distribution and the discretized Maxwell-Boltzmann distribution; calculating the weight coefficients corresponding to the discrete velocities of the fluid particles based on the univariate polynomial equation; and deriving a lattice Boltzmann model using the weight coefficients. A lattice Boltzmann model with superior stability and accuracy may be derived easily.Type: GrantFiled: June 16, 2011Date of Patent: July 8, 2014Assignee: Korea Institute of Science and TechnologyInventors: Jae Wan Shim, Hyun Cheol Koo, Suk Hee Han, Byoung Chul Min, Jun Woo Choi, Kyung Ho Shin, Jin Dong Song
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Patent number: 8586964Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.Type: GrantFiled: October 25, 2010Date of Patent: November 19, 2013Assignee: Korea Institute of Science and TechnologyInventors: Jin-Dong Song, Sang Hoon Shin, Hyung-jun Kim, Hyun Cheol Koo, Suk Hee Han, Joonyeon Chang
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Patent number: 8587044Abstract: A complementary logic device includes: an insulating layer formed on a substrate; a source electrode formed of a ferromagnetic body on the insulating layer; a gate insulating film; a gate electrode formed on the gate insulating film and controlling a magnetization direction of the source electrode; a channel layer formed on each of a first side surface and a second side surface of the source electrode and transmitting spin-polarized electrons from the source electrode; a first drain electrode formed on the first side surface of the source electrode; and a second drain electrode formed on the second side surface of the source electrode, wherein a magnetization direction of the first drain electrode and a magnetization direction of the second drain electrode are antiparallel to each other. Therefore, not only characteristics of low power and high speed but also characteristics of non-volatility and multiple switching by spin may be obtained.Type: GrantFiled: November 2, 2012Date of Patent: November 19, 2013Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Hyung Jun Kim, Joon Yeon Chang, Suk Hee Han, Hi Jung Kim
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Patent number: 8421060Abstract: A logic device includes: a substrate having a channel layer; two input terminal patterns of ferromagnetic material formed on the substrate and spaced apart from each other along a longitudinal direction of the channel layer so as to serve as the input terminals of a logic gate; and an output terminal pattern of ferromagnetic material formed on the substrate and disposed between the two input terminal patterns to serve as an output terminal of the logic gate. The output terminal pattern reads an output voltage by using spin accumulation and diffusion of electron spins which are injected into the channel layer from the input terminal patterns.Type: GrantFiled: January 8, 2010Date of Patent: April 16, 2013Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Suk Hee Han, Joon Yeon Chang, Hyung Jun Kim, Jang Hae Ku
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Publication number: 20120296615Abstract: A method for simulating fluid flow includes: discretizing a space in which a fluid flows into a regular lattice; assuming that fluid particles repetitively move and collide in the lattice; deriving a univariate polynomial equation by comparing the n-th (n is a non-negative integer) order momentum of velocity between the Maxwell-Boltzmann distribution and the discretized Maxwell-Boltzmann distribution; calculating the weight coefficients corresponding to the discrete velocities of the fluid particles based on the univariate polynomial equation; and deriving a lattice Boltzmann model using the weight coefficients. A lattice Boltzmann model with superior stability and accuracy may be derived easily.Type: ApplicationFiled: June 16, 2011Publication date: November 22, 2012Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Jae Wan SHIM, Hyun Cheol KOO, Suk Hee HAN, Byoung Chul MIN, Jun Woo CHOI, Kyung Ho SHIN, Jin Dong SONG
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Patent number: 8183611Abstract: A spin transistor that includes: a semiconductor substrate including an upper cladding layer and a lower cladding layer, and a channel layer interposed between the upper and lower cladding layers; a ferromagnetic source and a ferromagnetic drain formed on the semiconductor substrate and spaced from each other in a length direction of the channel layer; and a gate electrode formed on the semiconductor substrate between the source and the drain and having applied a gate voltage thereto to control a spin precession of an electron passing through the channel layer, wherein the semiconductor substrate includes a first carrier supply layer of a first conductivity type disposed below the lower cladding layer and supplying carriers to the channel layer, and a second carrier supply layer of a second conductivity type opposite to the first conductivity type formed on the upper cladding layer and supplying the carriers to the channel layer.Type: GrantFiled: August 18, 2010Date of Patent: May 22, 2012Assignee: Korea Institute of Science and TechnologyInventors: Hyung Jun Kim, Jin Dong Song, Hyun Cheol Koo, Kyung Ho Kim, Suk Hee Han
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Patent number: 8125247Abstract: There is provided a complementary spin transistor logic circuit, including: a parallel spin transistor that includes a magnetized first source, a first drain magnetized in parallel with the magnetization direction of the first source, a first channel layer and a first gate electrode; and an anti-parallel spin transistor that includes a magnetized second source, a second drain magnetized in anti-parallel with the magnetization direction of the second source, a second channel layer and a second gate electrode, wherein the first gate electrode and the second gate electrode are connected to a common input terminal.Type: GrantFiled: October 7, 2010Date of Patent: February 28, 2012Assignee: Korea Institute of Science and TechnologyInventors: Hyun Cheol Koo, Suk Hee Han, Joon Yeon Chang, Hyung Jun Kim, Jun Woo Choi
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Publication number: 20120007045Abstract: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.Type: ApplicationFiled: October 25, 2010Publication date: January 12, 2012Inventors: JIN-DONG SONG, Sang Hoon Shin, Hyung-jun Kim, Hyun Cheol Koo, Suk Hee Han, Joonyeon Chang