Patents by Inventor Sukhyung PARK

Sukhyung PARK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICES INCLUDING GATE SPACER
    Publication number: 20240038873
    Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
    Type: Application
    Filed: October 9, 2023
    Publication date: February 1, 2024
    Inventors: Bongseok Suh, Daewon Kim, Beomjin Park, Sukhyung Park, Sungil Park, Jaehoon Shin, Bongseob Yang, Junggun You, Jaeyun Lee
  • Semiconductor devices including gate spacer
    Patent number: 11810964
    Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: November 7, 2023
    Inventors: Bongseok Suh, Daewon Kim, Beomjin Park, Sukhyung Park, Sungil Park, Jaehoon Shin, Bongseob Yang, Junggun You, Jaeyun Lee
  • INTEGRATED CIRCUIT DEVICES HAVING HIGHLY INTEGRATED NMOS AND PMOS TRANSISTORS THEREIN AND METHODS OF FABRICATING THE SAME
    Publication number: 20220165729
    Abstract: A semiconductor device may include a substrate including first and second active regions and a field region therebetween, first and second active patterns respectively provided on the first and second active regions, first and second source/drain patterns respectively provided on the first and second active patterns, a first channel pattern between the first source/drain patterns and a second channel pattern between the second source/drain patterns, and a gate electrode extended from the first channel pattern to the second channel pattern to cross the field region. Each of the first and second channel patterns may include semiconductor patterns, which are stacked to be spaced apart from each other. A width of a lower portion of the gate electrode on the field region may decrease with decreasing distance from a top surface of the substrate.
    Type: Application
    Filed: July 22, 2021
    Publication date: May 26, 2022
    Inventors: Jaehoon Shin, Bongseok Suh, Daewon Kim, Sukhyung Park, Junggun You, Jaeyun Lee
  • SEMICONDUCTOR DEVICES INCLUDING GATE SPACER
    Publication number: 20210313442
    Abstract: A semiconductor device includes a first active region defined on a substrate, a first gate electrode across the first active region, a first drain region in the first active region at a position adjacent to the first gate electrode, an undercut region between the first active region and the first gate electrode, and a first gate spacer on a side surface of the first gate electrode and extending into the undercut region.
    Type: Application
    Filed: October 1, 2020
    Publication date: October 7, 2021
    Inventors: Bongseok SUH, Daewon KIM, Beomjin PARK, Sukhyung PARK, Sungil PARK, Jaehoon SHIN, Bongseob YANG, Junggun YOU, Jaeyun LEE