Patents by Inventor Suman H. Patel

Suman H. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4476476
    Abstract: A CMOS gate protection diode clamping the input terminal to substrate potential is prevented from injecting carriers into the substrate and causing SCR latchup by forming the diode as a well to substrate junction, surrounded by another, reverse-biased, well, to both reduce injection and collect parasitic injected carriers before they can diffuse to cause latchup.
    Type: Grant
    Filed: April 1, 1981
    Date of Patent: October 9, 1984
    Assignee: National Semiconductor Corporation
    Inventors: James C. Yu, Suman H. Patel
  • Patent number: 4430621
    Abstract: A linear differential amplifier is fabricated in CMOS and combined with digital control so that an analog input signal can be converted to a selected output polarity. When the amplifier output is coupled directly to the inverting input the noninverting input provides a unity gain voltage follower configuration. To create a unity gain signal inverter, a matched pair of resistors is employed. One resistor is coupled between the amplifier output and the inverting input while the other is coupled between the analog signal input and the inverting input. In operation digital control is employed in switching between the two configurations. The sense of the differential amplifier is reversed when switching between configurations thereby to provide a substantial reduction of the effect of offset potential. To fully compensate the offset potential, a capacitor is periodically coupled across the amplifier input to charge it to the offset potential.
    Type: Grant
    Filed: May 21, 1981
    Date of Patent: February 7, 1984
    Assignee: National Semiconductor Corporation
    Inventors: James B. Wieser, Suman H. Patel
  • Patent number: 4001722
    Abstract: An integrated circuit relaxation oscillator includes a capacitor, a resistor forming a conductive path for charging the capacitor, a transistor for discharging the capacitor, and a control circuit responsive to the level of charge on the capacitor for controlling the conduction level of the transistor. The control circuit has a relatively high trip point while it is in one state and during the time that the capacitor is being charged, and a relatively low trip point while it is in a second state and during the time that the capacitor is being discharged. The control circuit is balanced, such that variations in process parameters and variations in the voltage level of the power supply do not appreciably affect the period of the oscillatory output signal.
    Type: Grant
    Filed: May 19, 1975
    Date of Patent: January 4, 1977
    Assignee: National Semiconductor Corporation
    Inventors: Suman H. Patel, Thomas Jones