Patents by Inventor SUMAN TENUGU

SUMAN TENUGU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Throughput performance for cross temperature handling scenarios
    Patent number: 10535383
    Abstract: A die includes a plurality of memory cells. The die also includes a calculation circuit configured to determine a difference between a write temperature and a read temperature in response to a read request for user data stored in the memory cells. The die further includes a notification circuit configured to signal a cross-temperature condition in response to the difference satisfying a threshold.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: January 14, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Anantharaj Thalaimalaivanaraj, Suman Tenugu, Arun Thandapani, Dharmaraju Marenahally Krishna, Sainath Viswasarai
  • THROUGHPUT PERFORMANCE FOR CROSS TEMPERATURE HANDLING SCENARIOS
    Publication number: 20190267054
    Abstract: A die includes a plurality of memory cells. The die also includes a calculation circuit configured to determine a difference between a write temperature and a read temperature in response to a read request for user data stored in the memory cells. The die further includes a notification circuit configured to signal a cross-temperature condition in response to the difference satisfying a threshold.
    Type: Application
    Filed: February 28, 2018
    Publication date: August 29, 2019
    Inventors: Anantharaj Thalaimalaivanaraj, Suman Tenugu, Arun Thandapani, Dharmaraju Marenahally Krishna, Sainath Viswasarai
  • Programming unprogrammed upper page during lower page programming of multi-level storage cells
    Patent number: 10319445
    Abstract: Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: June 11, 2019
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Bhavadip Solanki, Anantharaj Thalaimalai Vanaraj, Suman Tenugu, Arun Thandapani, Piyush Anil Dhotre, Chittoor Devarajan Sunilkumar, Dharmaraju Marenhally Krishna
  • PROGRAMMING UNPROGRAMMED UPPER PAGE DURING LOWER PAGE PROGRAMMING OF MULTI-LEVEL STORAGE CELLS
    Publication number: 20190164612
    Abstract: Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: BHAVADIP SOLANKI, ANANTHARAJ THALAIMALAI VANARAJ, SUMAN TENUGU, ARUN THANDAPANI, PIYUSH ANIL DHOTRE, CHITTOOR DEVARAJAN SUNILKUMAR, DHARMARAJU MARENHALLY KRISHNA