Patents by Inventor Sumeet C. Pandey
Sumeet C. Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240381781Abstract: A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous region is proximate to the magnetic region and is formed from a precursor trap material comprising at least one attractor species having at least one trap site and a chemical affinity for the diffusive species. The diffusive species is transferred from the precursor magnetic material to the precursor trap material where it bonds to the at least one attractor species at the trap sites. The species of the enriched trap material may intermix such that the enriched trap material becomes or stays amorphous. The depleted magnetic material may then be crystallized through propagation from a neighboring crystalline material without interference from the amorphous, enriched trap material. This enables high tunnel magnetoresistance and high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Gurtej S. Sandhu, Sumeet C. Pandey
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Publication number: 20240357809Abstract: Methods, systems, and devices for support structures for tier deflection in a memory system are described. The memory system may include a word line contact that extends through a stack of materials and lands on a tier of a word line. The word line contact may be between four support structures that form a diamond around the word line contact. Two support structures that form opposite vertices of the diamond may align centrally with the word line contact in a lateral direction and two other support structures that form opposite vertices of the diamond may align centrally with the word line contact in a longitudinal direction.Type: ApplicationFiled: April 16, 2024Publication date: October 24, 2024Inventors: Zeyar Lin Aung, Kaiming Luo, Saurabh Jagdishbhai Kasodariya, Sumeet C. Pandey, Brittany L. Kohoutek, Yuwei Ma, Kyle A. Ritter
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Patent number: 12062688Abstract: Some embodiments include dielectric material having a first region containing HfO and having a second region containing ZrO, where the chemical formulas indicate primary constituents rather than specific stoichiometries. The first region contains substantially no Zr, and the second region contains substantially no Hf. Some embodiments include capacitors having a first electrode, a second electrode, and a dielectric material between the first and second electrodes. The dielectric material includes one or more first regions and one or more second regions. The first region(s) contain(s) Hf and substantially no Zr. The second region(s) contain(s) Zr and substantially no Hf. Some embodiments include memory arrays.Type: GrantFiled: April 21, 2021Date of Patent: August 13, 2024Assignee: Micron Technology, Inc.Inventors: Richard Beeler, Matthew N. Rocklein, Timothy A. Quick, An-Jen B. Cheng, Sumeet C. Pandey
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Patent number: 12052929Abstract: A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous region is proximate to the magnetic region and is formed from a precursor trap material comprising at least one attractor species having at least one trap site and a chemical affinity for the diffusive species. The diffusive species is transferred from the precursor magnetic material to the precursor trap material where it bonds to the at least one attractor species at the trap sites. The species of the enriched trap material may intermix such that the enriched trap material becomes or stays amorphous. The depleted magnetic material may then be crystallized through propagation from a neighboring crystalline material without interference from the amorphous, enriched trap material. This enables high tunnel magnetoresistance and high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.Type: GrantFiled: February 2, 2022Date of Patent: July 30, 2024Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Sumeet C. Pandey
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Patent number: 11935782Abstract: A method of forming a structure comprises forming a pattern of elongate features extending vertically from a base structure. Conductive material is formed on the elongate features. After completing the forming of the pattern of elongate features, the elongate features, the conductive material, or both is (are) exposed to at least one surface treatment gas. The at least one surface treatment gas comprises at least one species formulated to diminish attractive or cohesive forces at a surface of the conductive material. Apparatus and additional methods are also described.Type: GrantFiled: March 7, 2022Date of Patent: March 19, 2024Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Marko Milojevic, John A. Smythe, Timothy A. Quick, Sumeet C. Pandey
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Publication number: 20230391805Abstract: A germanium precursor comprising a chemical formula of Ge(R1NC(R3)NR2)(R4) where each of R1, R2, R3, and R4 is independently selected from the group consisting of hydrogen, an alkyl, a substituted alkyl, an alkoxide, a substituted amide, an amine, a substituted amine, and a halogen. Methods of forming the germanium precursor and a precursor composition including the germanium precursor are also disclosed.Type: ApplicationFiled: June 1, 2023Publication date: December 7, 2023Inventors: Gurtej S. Sandhu, Sumeet C. Pandey, Stefan Uhlenbrock, John A. Smythe
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Publication number: 20230317800Abstract: Memory circuitry comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above a conductor tier. The insulative tiers and the conductive tiers of the laterally-spaced memory blocks extend from a memory-array region into a stair-step region. Strings of memory cells comprise operative channel-material strings that extend through the insulative tiers and the conductive tiers in individual of the laterally-spaced memory blocks in the memory-array region. The operative channel-material strings directly electrically couple with conductor material of the conductor tier. The individual laterally-spaced memory blocks comprise an intermediate region between the operative channel-material strings and the stair-step region. A dummy through-array-via (TAV) extends through the insulative tiers and the conductive tiers in the intermediate region in the individual laterally-spaced memory blocks.Type: ApplicationFiled: April 4, 2022Publication date: October 5, 2023Applicant: Micron Technology, Inc.Inventors: Dhirendra Dhananjay Vaidya, Lei Wei, Gurpreet Lugani, Sumeet C. Pandey
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Publication number: 20230317798Abstract: Systems, methods and apparatus are provided for transistors having a first source/drain region, a second source/drain region, and a channel region, wherein the channel region comprises an antimony-gallium-zinc-oxide (SbGZO) material.Type: ApplicationFiled: April 4, 2022Publication date: October 5, 2023Inventors: Adharsh Rajagopal, Scott E. Sills, Sumeet C. Pandey, David M. Guzman
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Patent number: 11651955Abstract: Methods of forming silicon nitride. Silicon nitride is formed on a substrate by atomic layer deposition at a temperature of less than or equal to about 275° C. The as-formed silicon nitride is exposed to a plasma. The silicon nitride may be formed as a portion of silicon nitride and at least one other portion of silicon nitride. The portion of silicon nitride and the at least one other portion of silicon nitride may be exposed to a plasma treatment. Methods of forming a semiconductor structure are also disclosed, as are semiconductor structures and silicon precursors.Type: GrantFiled: March 29, 2021Date of Patent: May 16, 2023Assignee: Micron Technology, Inc.Inventors: Sumeet C. Pandey, Brenda D. Kraus, Stefan Uhlenbrock, John A. Smythe, Timothy A. Quick
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Publication number: 20230067270Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes first tiers located one over another, the first tiers including respective first memory cells and first control gates for the memory cells, the first memory cells located along respective first pillars, the first pillars extending through the first tiers; second tiers located one over another, the second tiers including respective second memory cells and second control gates for the memory cells, the second memory cells located along respective second pillars, the second pillars extending through the second tiers; and a dielectric structure formed in a slit between the first tiers and the second tiers, the dielectric structure including an edge along a length of the slit and adjacent the first tiers, wherein the edge has a repeating pattern of a shape.Type: ApplicationFiled: August 10, 2022Publication date: March 2, 2023Inventors: Dheeraj Kumar, Sumeet C. Pandey, Surendranath C. Eruvuru
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Publication number: 20220344451Abstract: Some embodiments include dielectric material having a first region containing HfO and having a second region containing ZrO, where the chemical formulas indicate primary constituents rather than specific stoichiometries. The first region contains substantially no Zr, and the second region contains substantially no Hf. Some embodiments include capacitors having a first electrode, a second electrode, and a dielectric material between the first and second electrodes. The dielectric material includes one or more first regions and one or more second regions. The first region(s) contain(s) Hf and substantially no Zr. The second region(s) contain(s) Zr and substantially no Hf. Some embodiments include memory arrays.Type: ApplicationFiled: April 21, 2021Publication date: October 27, 2022Applicant: Micron Technology, Inc.Inventors: Richard Beeler, Matthew N. Rocklein, Timothy A. Quick, An-Jen B. Cheng, Sumeet C. Pandey
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Publication number: 20220344160Abstract: A method of forming a semiconductor device structure comprises forming at least one 2D material over a substrate. The at least one 2D material is treated with at least one laser beam having a frequency of electromagnetic radiation corresponding to a resonant frequency of crystalline defects within the at least one 2D material to selectively energize and remove the crystalline defects from the at least one 2D material. Additional methods of forming a semiconductor device structure, and related semiconductor device structures, semiconductor devices, and electronic systems are also described.Type: ApplicationFiled: July 8, 2022Publication date: October 27, 2022Inventors: Roy E. Meade, Sumeet C. Pandey
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Publication number: 20220238340Abstract: A method of forming a structure comprises forming a pattern of elongate features extending vertically from a base structure. Conductive material is formed on the elongate features. After completing the forming of the pattern of elongate features, the elongate features, the conductive material, or both is (are) exposed to at least one surface treatment gas. The at least one surface treatment gas comprises at least one species formulated to diminish attractive or cohesive forces at a surface of the conductive material. Apparatus and additional methods are also described.Type: ApplicationFiled: March 7, 2022Publication date: July 28, 2022Inventors: Gurtej S. Sandhu, Marko Milojevic, John A. Smythe, Timothy A. Quick, Sumeet C. Pandey
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Patent number: 11393687Abstract: A method of forming a semiconductor device structure comprises forming at least one 2D material over a substrate. The at least one 2D material is treated with at least one laser beam having a frequency of electromagnetic radiation corresponding to a resonant frequency of crystalline defects within the at least one 2D material to selectively energize and remove the crystalline defects from the at least one 2D material. Additional methods of forming a semiconductor device structure, and related semiconductor device structures, semiconductor devices, and electronic systems are also described.Type: GrantFiled: May 22, 2018Date of Patent: July 19, 2022Assignee: Micron Technology, Inc.Inventors: Roy E. Meade, Sumeet C. Pandey
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Publication number: 20220158086Abstract: A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous region is proximate to the magnetic region and is formed from a precursor trap material comprising at least one attractor species having at least one trap site and a chemical affinity for the diffusive species. The diffusive species is transferred from the precursor magnetic material to the precursor trap material where it bonds to the at least one attractor species at the trap sites. The species of the enriched trap material may intermix such that the enriched trap material becomes or stays amorphous. The depleted magnetic material may then be crystallized through propagation from a neighboring crystalline material without interference from the amorphous, enriched trap material. This enables high tunnel magnetoresistance and high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.Type: ApplicationFiled: February 2, 2022Publication date: May 19, 2022Inventors: Gurtej S. Sandhu, Sumeet C. Pandey
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Patent number: 11270909Abstract: A method of forming a structure comprises forming a pattern of elongate features extending vertically from a base structure. Conductive material is formed on the elongate features. After completing the forming of the pattern of elongate features, the elongate features, the conductive material, or both is (are) exposed to at least one surface treatment gas. The at least one surface treatment gas comprises at least one species formulated to diminish attractive or cohesive forces at a surface of the conductive material. Apparatus and additional methods are also described.Type: GrantFiled: January 27, 2020Date of Patent: March 8, 2022Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Marko Milojevic, John A. Smythe, Timothy A. Quick, Sumeet C. Pandey
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Patent number: 11257962Abstract: A transistor comprises a channel region between a source region and a drain region, a dielectric material adjacent to the channel region, an electrode adjacent to the dielectric material, and an electrolyte between the dielectric material and the electrode. Related semiconductor devices comprising at least one transistors, related electronic systems, and related methods are also disclosed.Type: GrantFiled: May 2, 2019Date of Patent: February 22, 2022Assignee: Micron Technology, Inc.Inventors: Yunfei Gao, Kamal M. Karda, Stephen J. Kramer, Gurtej S. Sandhu, Sumeet C. Pandey, Haitao Liu
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Patent number: 11251363Abstract: A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous region is proximate to the magnetic region and is formed from a precursor trap material comprising at least one attractor species having at least one trap site and a chemical affinity for the diffusive species. The diffusive species is transferred from the precursor magnetic material to the precursor trap material where it bonds to the at least one attractor species at the trap sites. The species of the enriched trap material may intermix such that the enriched trap material becomes or stays amorphous. The depleted magnetic material may then be crystallized through propagation from a neighboring crystalline material without interference from the amorphous, enriched trap material. This enables high tunnel magnetoresistance and high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.Type: GrantFiled: December 9, 2019Date of Patent: February 15, 2022Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Sumeet C. Pandey
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Publication number: 20210381107Abstract: A material deposition system comprises a precursor source and a chemical vapor deposition apparatus in selective fluid communication with the precursor source. The precursor source configured to contain at least one metal-containing precursor material in one or more of a liquid state and a solid state. The chemical vapor deposition apparatus comprises a housing structure, a distribution manifold, and a substrate holder. The housing structure is configured and positioned to receive at least one feed fluid stream comprising the at least one metal-containing precursor material. The distribution manifold is within the housing structure and is in electrical communication with a signal generator. The substrate holder is within the housing structure, is spaced apart from the distribution assembly, and is in electrical communication with an additional signal generator. A microelectronic device and methods of forming a microelectronic device also described.Type: ApplicationFiled: June 3, 2020Publication date: December 9, 2021Inventors: John A. Smythe, Gurtej S. Sandhu, Sumeet C. Pandey, Michael E. Koltonski
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Patent number: 11152205Abstract: A silicon chalcogenate precursor comprising the chemical formula of Si(XR1)nR24-n, where X is sulfur, selenium, or tellurium, R1 is hydrogen, an alkyl group, a substituted alkyl group, an alkoxide group, a substituted alkoxide group, an amide group, a substituted amide group, an amine group, a substituted amine group, or a halogen group, each R2 is independently hydrogen, an alkyl group, a substituted alkyl group, an alkoxide group, a substituted alkoxide group, an amide group, a substituted amide group, an amine group, a substituted amine group, or a halogen group, and n is 1, 2, 3, or 4. Methods of forming the silicon chalcogenate precursor, methods of forming silicon nitride, and methods of forming a semiconductor structure are also disclosed.Type: GrantFiled: March 6, 2018Date of Patent: October 19, 2021Assignee: Micron Technology, Inc.Inventors: Timothy A. Quick, Sumeet C. Pandey, Stefan Uhlenbrock