Patents by Inventor Sumiaki Takei

Sumiaki Takei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4514646
    Abstract: An abnormal surge voltage such as frictional static electricity is often applied to the external terminals of a MOSIC. In the past, the output MOS transistor in the MOSIC during normal handling of the device frequently will have its gate insulating film broken down by the application of such an abnormal surge voltage to the drain thereof. In order to prevent the gate insulating film from being broken down, in this manner a resistor is connected between the gate of the output MOS transistor and a drive circuit for driving that output MOS transistor. This construction using a resistor is superior to the construction in which the voltage to be applied to the drain of the output MOS transistor is clamped by the use of suitable clamp means only because, with the resistor arrangement, the output characteristics of the MOSIC are not restricted.
    Type: Grant
    Filed: August 6, 1981
    Date of Patent: April 30, 1985
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Yoshibumi Ando, Takashi Sakamoto, Kanji Yoh, Hisahiro Moriuchi, Sumiaki Takei