Abstract: A variable resistance memory device includes a substrate, a cell array region including a plurality of memory cells on the substrate, a wiring region which includes an inter-wiring insulating film stacked on the cell array region, and an upper wiring structure in the inter-wiring insulating film and a protective film which covers an upper surface of the cell array region, between the cell array region and the wiring region, wherein each of the memory cells includes a switching pattern and a variable resistance pattern, the cell array region further includes first conductive lines extending in a first direction, and a second conductive lines extending in a second direction intersecting the first direction, and the plurality of memory cells are disposed at an intersections of the first conductive lines and the second conductive lines.