Patents by Inventor Sumio Kuroda

Sumio Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11127476
    Abstract: According to one embodiment, a memory system includes a first memory and a memory controller. The first memory is nonvolatile and includes a plurality of memory cell transistors, each of which stores data corresponding to a threshold voltage. The memory controller causes the first memory to execute a read operation to acquire data corresponding to the threshold voltage from the plurality of memory cell transistors on the basis of a result of comparison between the threshold voltage and a read voltage. The memory controller selects a first candidate value from among a plurality of candidate values for the read voltage in accordance with a degree of stress that affects the threshold voltage; and causes the first memory to execute the read operation using the first candidate value as the read voltage.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: September 21, 2021
    Assignee: Kioxia Corporation
    Inventors: Kazutaka Takizawa, Yoshihisa Kojima, Sumio Kuroda, Masaaki Niijima
  • Publication number: 20210082528
    Abstract: According to one embodiment, a memory system includes a first memory and a memory controller. The first memory is nonvolatile and includes a plurality of memory cell transistors, each of which stores data corresponding to a threshold voltage. The memory controller causes the first memory to execute a read operation to acquire data corresponding to the threshold voltage from the plurality of memory cell transistors on the basis of a result of comparison between the threshold voltage and a read voltage. The memory controller selects a first candidate value from among a plurality of candidate values for the read voltage in accordance with a degree of stress that affects the threshold voltage; and causes the first memory to execute the read operation using the first candidate value as the read voltage.
    Type: Application
    Filed: March 12, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Kazutaka TAKIZAWA, Yoshihisa KOJIMA, Sumio KURODA, Masaaki NIIJIMA
  • Patent number: 10789125
    Abstract: A memory system includes a plurality of memory cells and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: September 29, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Katsuhiko Ueki, Sumio Kuroda, Yasuyuki Ozawa
  • Publication number: 20190235952
    Abstract: A memory system includes a plurality of memory cells and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.
    Type: Application
    Filed: April 10, 2019
    Publication date: August 1, 2019
    Inventors: Katsuhiko UEKI, Sumio KURODA, Yasuyuki OZAWA
  • Patent number: 10261857
    Abstract: A memory system includes a memory that includes a plurality of memory cells, and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: April 16, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Katsuhiko Ueki, Sumio Kuroda, Yasuyuki Ozawa
  • Patent number: 10249349
    Abstract: According to one embodiment, a control system includes: a memory device; and a controller. The memory device includes a first cell transistor. The controller is configured to store information on a first temperature associated with a temperature of the memory device upon a write of data in the first cell transistor, obtain a second temperature of the memory device, determine an adjustment from adjustments based on a combination of the first temperature and the second temperature, and instruct the memory device to use for a first parameter a first value and a value which is based on the determined adjustment to read data from the first cell transistor.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: April 2, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Kazutaka Takizawa, Yoshihisa Kojima, Sumio Kuroda, Masaaki Niijima
  • Publication number: 20180277173
    Abstract: According to one embodiment, a control system includes: a memory device; and a controller. The memory device includes a first cell transistor. The controller is configured to store information on a first temperature associated with a temperature of the memory device upon a write of data in the first cell transistor, obtain a second temperature of the memory device, determine an adjustment from adjustments based on a combination of the first temperature and the second temperature, and instruct the memory device to use for a first parameter a first value and a value which is based on the determined adjustment to read data from the first cell transistor.
    Type: Application
    Filed: August 31, 2017
    Publication date: September 27, 2018
    Inventors: Kazutaka Takizawa, Yoshihisa Kojima, Sumio Kuroda, Masaaki Niijima
  • Publication number: 20180076829
    Abstract: A memory system includes a memory that includes a plurality of memory cells, and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.
    Type: Application
    Filed: March 3, 2017
    Publication date: March 15, 2018
    Inventors: Katsuhiko UEKI, Sumio KURODA, Yasuyuki OZAWA
  • Publication number: 20140211599
    Abstract: According to one embodiment, a method for information processing executed in an information processing apparatus processing recording data, including, dividing the recording data into a plurality of recording data blocks, recording management information on corresponding first management areas in n storage media, the n storage media comprising a first storage medium to an nth storage medium, wherein n comprises an integer equal to or larger than 2, and recording the recording data blocks on corresponding second management areas of the n storage media by a controller configured to control the information processing apparatus.
    Type: Application
    Filed: January 30, 2014
    Publication date: July 31, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sumio Kuroda, Kazuhito Shimomura, Kenichiro Suzuki, Yuji Sakai, Hideaki Ohsawa, Kouichi Ogi
  • Patent number: 8760983
    Abstract: According to one embodiment, an information recording apparatus includes a divider, a generator, and a recorder. The divider is configured to divide recording data into a plurality of recording data blocks for each predetermined recording unit. The generator is configured to set, as a first block set, n recording data blocks recorded in corresponding areas in file system management areas of n, first to nth (n: integer, n?2) storages, and generate first parity data from the n recording data blocks forming the first block set. The recorder is configured to record the n recording data blocks forming the first block set and the first parity data.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Suzuki, Kazuhito Shimomura, Yuji Sakai, Sumio Kuroda, Kouichi Ogi
  • Publication number: 20140075461
    Abstract: According to one embodiment, a medium processing method includes first reading, second reading, and determining. The first reading is configured to read first medium identification information and cassette identification information which are stored in a first medium contained in a cassette. The second reading is configured to read cassette information from the cassette. The determining is configured to determine a cassette contained medium formed of the cassette and the medium as authentic, when the cassette information includes the first medium identification information and the cassette identification information.
    Type: Application
    Filed: August 22, 2013
    Publication date: March 13, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sumio Kuroda, Kazuhito Shimomura, Yuji Sakai, Kenichiro Suzuki
  • Publication number: 20140068641
    Abstract: According to one embodiment, the cassette is provided with an outer shell, a plurality of trays, a shutter, and a lock mechanism. The outer shell has an upper wall and a lower wall each including a square shape and a circular shape, a side wall between edges of the square shapes, and an opening portion between edges of the circular shapes. A tray is an annular shape having a concave portion in which an optical disk is placed. The shutter is a semicircular shape, includes a gear on an outer peripheral wall and a plurality of shelves to support each of the trays on an inner peripheral wall, and rotates from a first position for closing an opening portion to a second position for opening the opening portion. The lock mechanism locks the shutter in the first position.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 6, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sumio Kuroda, Kazuhito Shimomura, Yuji Sakai, Kenichiro Suzuki
  • Publication number: 20140043949
    Abstract: According to one embodiment, an information recording apparatus includes a divider, a generator, and a recorder. The divider is configured to divide recording data into a plurality of recording data blocks for each predetermined recording unit. The generator is configured to set, as a first block set, n recording data blocks recorded in corresponding areas in file system management areas of n, first to nth (n: integer, n?2) storages, and generate first parity data from the n recording data blocks forming the first block set. The recorder is configured to record the n recording data blocks forming the first block set and the first parity data.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Suzuki, Kazuhito Shimomura, Yuji Sakai, Sumio Kuroda, Kouichi Ogi
  • Patent number: 8111474
    Abstract: A magnetic storage apparatus has a reproducing head to reproduce information from a perpendicular magnetic recording medium that is recorded with servo information, eccentricity correction data and read/write data. The apparatus further has a filter part to filter a reproduced output of the reproducing head by filtering the servo information which has a differentiated waveform by a non-differentiating characteristic and by filtering the eccentricity correction data and the read/write data which have rectangular waveforms by a differentiating characteristic, a demodulating part to demodulate the servo information, the eccentricity correction data and the read/write data that are filtered by the filter part, and a servo system to carry out a control process including an eccentricity control based on the servo information and the eccentricity correction data that are demodulated.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: February 7, 2012
    Assignee: Toshiba Storage Device Corporation
    Inventors: Tsugito Maruyama, Sumio Kuroda
  • Patent number: 7787200
    Abstract: A master-disk producing device produces a master disk with master-disk identification information added. A disk producing device produces a first disk with the master-disk identification information added, using the master disk with the master-disk identification information added. A first disk device obtains, after the first disk with the master-disk identification information added is mounted, first correction information from a correction-information storing device based on the master-disk identification information of the first disk.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: August 31, 2010
    Assignee: Toshiba Storage Device Corporation
    Inventors: Hiroyuki Suzuki, Tomoyoshi Yamada, Masanori Fukushi, Kazuhiko Takaishi, Tsugito Maruyama, Sumio Kuroda
  • Publication number: 20100039725
    Abstract: A magnetic storage apparatus has a reproducing head to reproduce information from a perpendicular magnetic recording medium that is recorded with servo information, eccentricity correction data and read/write data. The apparatus further has a filter part to filter a reproduced output of the reproducing head by filtering the servo information which has a differentiated waveform by a non-differentiating characteristic and by filtering the eccentricity correction data and the read/write data which have rectangular waveforms by a differentiating characteristic, a demodulating part to demodulate the servo information, the eccentricity correction data and the read/write data that are filtered by the filter part, and a servo system to carry out a control process including an eccentricity control based on the servo information and the eccentricity correction data that are demodulated.
    Type: Application
    Filed: October 23, 2009
    Publication date: February 18, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Tsugito Maruyama, Sumio Kuroda
  • Patent number: 7630155
    Abstract: A magnetic storage apparatus has a reproducing head to reproduce information from a perpendicular magnetic recording medium that is recorded with servo information, eccentricity correction data and read/write data. The apparatus further has a filter part to filter a reproduced output of the reproducing head by filtering the servo information which has a differentiated waveform by a non-differentiating characteristic and by filtering the eccentricity correction data and the read/write data which have rectangular waveforms by a differentiating characteristic, a demodulating part to demodulate the servo information, the eccentricity correction data and the read/write data that are filtered by the filter part, and a servo system to carry out a control process including an eccentricity control based on the servo information and the eccentricity correction data that are demodulated.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: December 8, 2009
    Assignee: Fujitsu Limited
    Inventors: Tsugito Maruyama, Sumio Kuroda
  • Patent number: 7602566
    Abstract: A master is used for writing information to a magnetic recording disk by a magnetic transfer method. The recording disk includes a magnetic recording layer possessing vertical magnetic anisotropy. The master includes a servo zone corresponding part formed with a magnetic material pattern for recording servo information to the recording layer of the recording disk. The master also includes a user data zone corresponding part formed with a second magnetic material pattern for providing the recording layer of the recording disk with a dummy signal.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: October 13, 2009
    Assignee: Fujitsu Limited
    Inventors: Sumio Kuroda, Kazuyuki Ozaki
  • Publication number: 20090244793
    Abstract: A magnetic transfer method includes arranging a magnetic transfer master so as to cause a surface of the magnetic transfer master to be in proximity to or in contact with a vertical magnetic recording medium. The magnetic transfer master has on the surface thereof a concave-convex pattern representing information. A top surface of a convex portion of the concave-convex pattern is divided by a plurality of projecting threads lined up and extending at an interval shorter than a shortest pattern length of the concave-convex pattern. The magnetic transfer method includes applying a magnetic field to the magnetic transfer master in a direction along the surface and intersecting the projecting threads.
    Type: Application
    Filed: December 12, 2008
    Publication date: October 1, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Sumio Kuroda
  • Patent number: 7532421
    Abstract: Servo demodulation is performed by appropriately compensating for demodulation errors caused by fluctuation of the replayed signal amplitude of a phase servo pattern. A servo demodulating circuit comprises single waveform sampling means for reading into a register a single waveform of a servo burst signal included in a phase servo signal based on a sampling clock synchronized by clock synchronization means, single waveform digitizing means for calculating an amplitude value of the single waveform of the servo burst signal from peak and bottom of the single waveform of the servo burst signal read into the register, and for standardizing a value of the register based on an amplitude value of the single waveform of the servo burst signal, and phase information calculation means for calculating phase information of the single waveform of the servo burst signal based on the value of the register standardized by the waveform digitizing means.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: May 12, 2009
    Assignee: Fujitsu Limited
    Inventor: Sumio Kuroda