Patents by Inventor Sumio Maekawa

Sumio Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6270633
    Abstract: The present invention relates to an artificial latticed multi-layer film deposition apparatus for depositing on a substrate a gigantic magneto-resistive effect film (GMR film) having an artificial lattice structure formed of magnetic metal films and non-magnetic metal films alternately laminated one over the other and its object is to provide the artificial latticed multi-layer film deposition apparatus to enable easy and secure deposition of an artificial latticed multi-layer film having GMR characteristics.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: August 7, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Onaka, Sumio Maekawa, Shigeru Yamamoto, Masafumi Okamoto
  • Patent number: 5492491
    Abstract: A cable pinching section and a core wire connecting section are integrally linked together to allow connection of a cable before a terminal main body is assembled, thus simplifying a cable connection. In addition, terminal portions are formed as box-shaped terminals to obtain a reliable and stable engagement with a CRT anode electrode.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: February 20, 1996
    Assignee: Thomas & Betts Corporation
    Inventors: Masahiro Yamamoto, Sumio Maekawa
  • Patent number: 4168343
    Abstract: A thermal printing head having a substrate and a resistive element formed on the substrate wherein said resistive element is a thin layer which is composed of an electrically conducting material and an electrically insulating material. This thermal printing head has a high heat-resistivity, so that it may be used at a high temperature or for high speed printing.
    Type: Grant
    Filed: March 4, 1977
    Date of Patent: September 18, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoji Arai, Keizaburo Kuramasu, Sumio Maekawa
  • Patent number: 4096510
    Abstract: A semiconducting silicon device includes a semiconductor silicon substrate having a diffused layer and a silicon oxide film, a multi-layered electrode provided on the silicon oxide film and in contact with the diffused layer. The multi-layered electrode comprises Ti or Mo as first layer of electrode material and Ni as a second layer.
    Type: Grant
    Filed: August 3, 1977
    Date of Patent: June 20, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoji Arai, Shige Kuninobu, Sumio Maekawa