Patents by Inventor Sumit Arora

Sumit Arora has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200306400
    Abstract: An anti-microbial covering for use with electronic devices used in a healthcare environment is disclosed. The covering is impregnated during manufacturing with nano-sized silver particles and wrapped around the electronic device to stop the spread of nosocomial infections. The silver particles vary in shape and size to maximize the anti-microbial effects of each sheet, and each particle is sized to be less than 60 nanometers in diameter. The covering may be used in a process to disrupt nosocomial infections in a healthcare facility by having employees use the covering to cover electronic devices in the facility. The process includes a method for tailoring the anti-microbial covering to target specific pathogens present in the facility or, alternatively, tailor the covering to target pandemic level threats, such as for example the Covid-19 virus or seasonal influenza viruses.
    Type: Application
    Filed: June 5, 2020
    Publication date: October 1, 2020
    Applicant: Infection Sciences, LLC
    Inventors: Sumit Arora, Om Prakash Jha, Robert C. Ross, JR., J. Mark Swanzy
  • Publication number: 20180236118
    Abstract: An anti-microbial covering for use with electronic devices used in a hospital environment is disclosed. A flexible thermoplastic sheet is impregnated during manufacturing with nano-sized sliver particles and wrapped around the electronic device to stop the spread of nosocomial infections. The silver particles vary in shape and size to maximize the anti-microbial effects of each sheet, and each particle is sized to be less than 60 nanometers in diameter. The present invention includes a process for producing each sheet by combining low density polyethylene, linear low density polyethylene, polyphthalamide and other additives with sliver nanoparticles, and then extruding the thermoplastic mixture under heat to form thin impregnated sheets. The liner sheets may then be die-cut to form shaped perforations to facilitate the shaping of each sheet around a targeted electronic device, and cut into convenient sizes for dispensing.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 23, 2018
    Applicant: Infection Sciences, LLC
    Inventors: Sumit Arora, Om Prakash Jha, Robert C. Ross, JR., J. Mark Swanzy
  • Publication number: 20180193239
    Abstract: A method for reducing or inhibiting damage to skin is disclosed herein. In some embodiments, the damage is ultraviolet (UV) radiation-induced damage. In some embodiments, the method comprises applying to the skin prior to exposure to radiation damaging source, a formulation containing an effective amount of silver nanoparticles (AgNPs) A method for treating damaged skin, and formulations include AgNPs are also disclosed.
    Type: Application
    Filed: November 2, 2017
    Publication date: July 12, 2018
    Applicant: University of South Alabama
    Inventors: Ajay Pratap Singh, Sumit Arora, Seema Singh
  • Publication number: 20160235635
    Abstract: A method for reducing or inhibiting damage to skin is disclosed herein. In some embodiments, the damage is ultraviolet (UV) radiation-induced damage. In some embodiments, the method comprises applying to the skin prior to exposure to radiation damaging source, a formulation containing an effective amount of silver nanoparticles (AgNPs) A method for treating damaged skin, and formulations include AgNPs are also disclosed.
    Type: Application
    Filed: October 16, 2014
    Publication date: August 18, 2016
    Applicant: University of South Alabama
    Inventors: Ajay Pratap Singh, Sumit Arora, Seema Singh
  • Patent number: 8977995
    Abstract: In one embodiment, a method of designing an integrated circuit is disclosed, including receiving a plurality of top level timing constraints and a description of the integrated circuit design defining a hierarchy of partitions having multiple levels with one or more nested partitions; generating timing models for each partition of the plurality of partitions in response to the description of the integrated circuit design; and concurrently generating timing budgets level by level for all partitions at each level, beginning with the lowest level to each next upper level of the hierarchy of the partitions in response to the description of the integrated circuit design, the timing models, and the plurality of top level timing constraints. Please see the detailed description and claims for other embodiments that are respectively disclosed and claimed.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: March 10, 2015
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sumit Arora, Oleg Levitsky, Amit Kumar, Sushobhit Singh
  • Patent number: 7865857
    Abstract: Features are provided for graphically representing constraints on design objects in an Electronic Design Automation tool. A particular constraint on one or more circuit objects is displayed as a highlighted region that extends to each visible circuit object to which the constraint applies. Attributes of the highlighted region, such as density and thickness, may proportionally represent attributes of the constraint, such as a strength or distance specified by the constraint. The highlighted region is superimposed on or around circuit objects. The highlighted region may be a halo, which is a partially transparent region filled with a color. Multiple regions that represent the same type of constraint or relationship are connected by line segments, providing the ability to visualize groups of constrained objects, including groups that span levels of a hierarchical design. Intersecting highlighted regions are blended together using techniques such as alpha blending.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: January 4, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Amit Chopra, Ian Gebbie, Donald O'Riordan, Sumit Arora, Jean-Daniel Sonnard