Abstract: Systems, methods, and software are disclosed herein having enhanced modular carrier form factors. In an implementation, a network card apparatus comprises a network card assembly. The network card assembly comprises a network interface card and a connector card coupled to the network interface card and comprising a U.2 connector configured to mate with a U.2 connector of the modular bay of the rackmount chassis assembly.

Abstract: Systems, methods, apparatuses, and architectures for storage interposers are provided herein. In one example, an apparatus includes a host connector configured to couple to one or more host systems over associated host Peripheral Component Interconnect Express (PCIe) interfaces, and PCIe switch circuitry configured to receive storage operations over the host connector that are issued by the one or more host systems. The PCIe switch circuitry is configured to monitor when ones of the storage operations correspond to an address range and responsively indicate the ones of the storage operations to a control module. The control module is configured to selectively direct delivery of the ones of the storage operations to corresponding storage areas among one or more storage devices based at least on addressing information monitored for the ones of the storage operations in the PCIe switch circuitry.

Abstract: Machine templates are described herein that provide for enhanced configuration and deployment of arrangements of physical computing components coupled over a communication fabric. In one example, a method includes presenting a user interface indicating a plurality of templates each specifying at least a predefined arrangement of physical computing components for inclusion in compute units, and receiving a user selection indicating a selected template among the plurality of templates to form a target compute unit. The method includes allocating to the target compute unit a set of physical computing components according to the selected template, and instructing a management entity to establish the target compute unit based at least on logical partitioning within a communication fabric communicatively coupling the set of physical computing components of the target compute unit.

Abstract: Deployment of arrangements of physical computing components coupled over a communication fabric are presented herein. In one example, a method includes detecting disaggregated computing components communicatively coupled to at least a first communication fabric, and detecting converged computing components communicatively coupled to a second communication fabric. The method includes forming a free pool of computing components comprising the disaggregated computing components and the converged computing components, and receiving user commands to form compute units from among computing components included in the free pool of computing components. Based at least on the user commands, the method includes forming the compute units for use by one or more users.

Abstract: Deployment of arrangements of computing components coupled over a communication fabric are presented herein. In one example, a method includes detecting first computing components communicatively coupled to a first communication fabric having a first communication fabric type, and detecting second computing components communicatively coupled to a second communication fabric having a second communication fabric type. The method also includes receiving user commands to form compute units among a pool of computing components comprising the first computing components and the second computing components. Based at least on the user commands, the method includes forming the compute units for use by one or more users.

Abstract: Machine policies are described herein that provide for enhanced operation and dynamic alteration of compute units comprising physical computing components coupled over a communication fabric. In one example, a method includes presenting a user interface indicating a plurality of policies specifying operational triggers and responsive actions for altering composition of compute units, receiving a first user selection indicating a set of physical computing components to form a target compute unit, and receiving a second user selection indicating a selected policy among the plurality of policies to apply to the target compute unit.

Abstract: A Solid-State Disk (SSD) Manufacturing Self Test (MST) capability enables an SSD manufacturer to generate and load tests onto SSDs, run the tests, and gather results. The SSDs self execute the loaded tests when powered up. The self executing is while coupled to a host that loaded the tests or while coupled to a rack unable to load the tests but enabled to provide power to the SSDs. The rack is optionally cost-reduced to enable cost-efficient parallel testing of relatively larger numbers of SSDs for production. The host writes the tests to an ‘input’ SMART log of each SSD, and each SSD writes results to a respective included ‘output’ SMART log. The commands include write drive, erase drive, SATA PHY burn-in, delay, and stress mode. The SSD MST capability is optionally used in conjunction with an SSD virtual manufacturing model.

Abstract: A storage card insertable into a host system is provided that includes a plurality of storage devices connectors. The storage card include slot offset features to offset a circuit board of the storage card from a host system slot alignment. This offset provides for storage device connector placement on both sides of the storage card. The storage card also can include a Peripheral Component Interconnect Express (PCIe) switch circuit configured to communicatively couple the PCIe signaling of the plurality of storage device connectors and PCIe signaling of a host connector of the storage card, where the PCIe switch circuit is configured to receive storage operations over the PCIe signaling of the host connector of the storage card and transfer the storage operations for delivery over the PCIe signaling of selected ones of the plurality of storage device connectors.

Abstract: Computing architectures, platforms, and systems are provided herein. In one example, system is provided. The system includes a first processor configured to initiate a communication arrangement between a first peripheral component interconnect express (PCIe) device and a second PCIe device. The communication arrangement is configured to detect transfers from the first PCIe device to one or more addresses corresponding to an address range of the second PCIe device, and redirect the transfers to the second PCIe device without passing the transfers through a second processor that initiates the transfers.

Abstract: Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a method of operating a data processing system is provided. The method includes instructing a PCIe fabric communicatively coupling a plurality of physical computing components including PCIe devices and one or more PCIe switches to establish a first PCIe communication path between the management processor and a target PCIe device. The method also includes directing at least configuration data to the target PCIe device using the first PCIe communication path and instructing the PCIe fabric to remove the first PCIe communication path between the management processor and the target PCIe device. The method also includes instructing the PCIe fabric to establish a second PCIe communication path between a selected PCIe device and the target PCIe device configured according to the configuration data.

Abstract: A storage card insertable into a host system is provided that includes a plurality of storage devices connectors. The storage card include slot offset features to offset a circuit board of the storage card from a host system slot alignment. This offset provides for storage device connector placement on both sides of the storage card. The storage card also can include a Peripheral Component Interconnect Express (PCIe) switch circuit configured to communicatively couple the PCIe signaling of the plurality of storage device connectors and PCIe signaling of a host connector of the storage card, where the PCIe switch circuit is configured to receive storage operations over the PCIe signaling of the host connector of the storage card and transfer the storage operations for delivery over the PCIe signaling of selected ones of the plurality of storage device connectors.

Abstract: A connectivity card insertable into a connector of a host system is provided. The connectivity card includes a plurality of Peripheral Component Interconnect Express (PCIe) connectors configured to provide external PCIe ports on the connectivity card, each of the plurality of PCIe connectors capable of carrying PCIe traffic. The connectivity card also includes a PCIe switch circuit configured to communicatively couple the plurality of connectors to a shared connectivity interface carried over a host connector of the connectivity card. The connectivity card further includes control circuitry configured to monitor for connectivity issues that arise with regard to the plurality of PCIe connectors, and responsively mitigate the connectivity issues by at least reconfiguring a communication pathway in the PCIe switch circuit for at least a portion of the PCIe traffic affected by the connectivity issues.

Abstract: Computing architectures, platforms, and systems are provided herein. In one example, a computing system is provided. The computing system includes a management processor configured to initiate a peer-to-peer arrangement between a first peripheral component interconnect express (PCIe) device and a second PCIe device over a PCIe fabric comprising one or more PCIe switches. The peer-to-peer arrangement is established to detect data transfers from the first PCIe device directed to addresses corresponding to an address range established for the second PCIe device by a peer-to-peer management entity executed on a host processor, and redirect the data transfers over the PCIe fabric to the second PCIe device such that the data transfers are received by the second PCIe device without passing through the host processor.

Abstract: A storage card insertable into a host system is provided that includes a plurality of storage devices connectors. The storage card include slot offset features to offset a circuit board of the storage card from a host system slot alignment. This offset provides for storage device connector placement on both sides of the storage card. The storage card also can include a Peripheral Component Interconnect Express (PCIe) switch circuit configured to communicatively couple the PCIe signaling of the plurality of storage device connectors and PCIe signaling of a host connector of the storage card, where the PCIe switch circuit is configured to receive storage operations over the PCIe signaling of the host connector of the storage card and transfer the storage operations for delivery over the PCIe signaling of selected ones of the plurality of storage device connectors.

Abstract: Systems, methods, apparatuses, and architectures for storage interposers are provided herein. In one example, an apparatus includes a host connector configured to couple to one or more host systems over associated host Peripheral Component Interconnect Express (PCIe) interfaces, and PCIe switch circuitry configured to receive storage operations over the host connector that are issued by the one or more host systems. The PCIe switch circuitry is configured to monitor when ones of the storage operations correspond to an address range and responsively indicate the ones of the storage operations to a control module. The control module is configured to selectively direct delivery of the ones of the storage operations to corresponding storage areas among one or more storage devices based at least on addressing information monitored for the ones of the storage operations in the PCIe switch circuitry.

Abstract: Systems, methods, apparatuses, and architectures for storage interposers are provided herein. In one example, a storage interposer module includes Peripheral Component Interconnect Express (PCIe) switch circuitry receives storage operations over a host connector that are issued by one or more host systems and transfers the storage operations for storage by one or more storage devices over drive PCIe interfaces. The storage interposer module also includes a control module configured to monitor the storage operations in the PCIe switch circuitry via a control interface coupled between the PCIe switch circuitry and the interposer control module, and selectively direct delivery of each of the storage operations to corresponding storage areas among the one or more storage devices based at least on information monitored about the storage operations in the PCIe switch circuitry.

Abstract: Enhanced data storage devices in various form factors are discussed herein. In one example, a storage drive includes a 2.5-inch form factor chassis that structurally supports elements of the storage drive, and at least one host connector. The storage drive also includes a plurality of M.2 storage device connectors, and a Peripheral Component Interconnect Express (PCIe) switch circuit configured to receive storage operations over the at least one host connector and transfer the storage operations for delivery to ones of the plurality of M.2 storage device connectors over associated device PCIe interfaces. The storage drive also includes power circuitry configured to provide holdup power to ones of the plurality of M.2 storage device connectors after loss of input power over the at least one host connector.

Abstract: Enhanced data storage devices in various form factors are discussed herein. In one example, a storage drive includes a plurality of storage devices configured to store and retrieve data responsive to operations received over Peripheral Component Interconnect Express (PCIe) interfaces, a PCIe switch circuit communicatively coupled to the PCIe interfaces of the storage devices and configured to receive over a host connector the operations issued by a host system and transfer the storage operations for ones of the storage devices over associated ones of the PCIe interfaces. The storage drive includes holdup circuitry configured to provide holdup power the storage devices. The storage drive includes a first circuit board assembly comprising three storage device connectors that couple to corresponding storage devices, and a second circuit board assembly comprising a further storage device connector that couples to a further storage device.

Abstract: A connectivity card insertable into a connector of a host system is provided. The connectivity card includes a plurality of Peripheral Component Interconnect Express (PCIe) connectors configured to provide external PCIe ports on the connectivity card, each of the plurality of PCIe connectors capable of carrying PCIe traffic. The connectivity card also includes a PCIe switch circuit configured to communicatively couple the plurality of connectors to a shared connectivity interface carried over a host connector of the connectivity card. The connectivity card further includes control circuitry configured to monitor for connectivity issues that arise with regard to the plurality of PCIe connectors, and responsively mitigate the connectivity issues by at least reconfiguring a communication pathway in the PCIe switch circuit for at least a portion of the PCIe traffic affected by the connectivity issues.

Abstract: Systems, methods, and software are disclosed herein having enhanced modular carrier form factors. In an implementation, a network card apparatus comprises a network card assembly. The network card assembly comprises a network interface card and a connector card coupled to the network interface card and comprising a U.2 connector configured to mate with a U.2 connector of the modular bay of the rackmount chassis assembly.