Patents by Inventor Sumit Rao

Sumit Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240189041
    Abstract: Disclosed herein is a medical system (100, 300, 500, 600) comprising: a medical imaging system (102, 302) configured to acquire medical imaging data (136) descriptive of a subject (110); a camera system (114) configured to acquire a subject image (138) of the subject; a memory (126) storing machine executable instructions (130), medical imaging system commands (134), and a coordinate system mapping, and an image marking neural network (132).
    Type: Application
    Filed: March 30, 2022
    Publication date: June 13, 2024
    Inventors: Manikanda Krishnan V, Srinivasa Rao Kundeti, Sumit Sharma
  • Patent number: 11251794
    Abstract: An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: February 15, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Sumit Rao, Wilson Jianbo Chen, Chiew-Guan Tan
  • Publication number: 20210111720
    Abstract: An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level.
    Type: Application
    Filed: August 31, 2020
    Publication date: April 15, 2021
    Inventors: Sumit RAO, Wilson Jianbo CHEN, Chiew-Guan TAN
  • Patent number: 10892760
    Abstract: An apparatus for generating an output voltage signal based on an input voltage signal. The apparatus includes a first field effect transistor (FET) including a first gate configured to receive a first gate voltage based on the input voltage signal; a second (FET) including a second gate configured to receive a second gate voltage based on the input voltage signal, wherein the first and second FETs are coupled in series between a first voltage rail and a second voltage rail, and wherein the output voltage signal is produced at an output node between the first and second FETs; and a gate overdrive circuit configured to temporarily reduce the first gate voltage during a portion of a transition of the output voltage signal from a logic low level to a logic high level.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: January 12, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Sumit Rao, Wilson Jianbo Chen, Chiew-Guan Tan
  • Patent number: 10700683
    Abstract: Aspects generally relate to receivers, and in particular to a receiver that converts a high-voltage input signal into a low-voltage signal. The high voltage input signal is split into a upper portion and a lower portion. The upper portion is coupled to a high input receiver that is powered by dynamic supply shifters that can vary supply voltage during operation to optimize switching.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Jianbo Chen, Chiew-Guan Tan, Sumit Rao
  • Patent number: 9735763
    Abstract: An input receiver for stepping down a high power domain input signal for a high power domain powered by a high power supply voltage into an output signal for a low power domain includes a waveform splitter. The waveform splitter splits the high power domain input signal into a high voltage signal and a low voltage signal. A high voltage input receiver receives the high voltage signal to produce a received high voltage that is level shifted into a first input signal. A low voltage input receiver receives the low voltage signal to produce a second input signal. A logic circuit generates the output signal from the first input signal and the second input signal.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: August 15, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Wilson Chen, Chiew-Guan Tan, Sumit Rao