Patents by Inventor Sumit Tayal

Sumit Tayal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INPUT VOLTAGE DEGRADATION DETECTION
    Publication number: 20260178223
    Abstract: A method includes performing a self-initiated test memory operation of a memory device in a memory sub-system and detecting, via a sensor circuit, an input voltage or input current of the memory device or the memory sub-system. The method further includes determining whether the input voltage or the input current meets a degradation criteria and generating a management control signal responsive based on the determination whether the input voltage or the input current meets the degradation criteria.
    Type: Application
    Filed: February 11, 2026
    Publication date: June 25, 2026
    Inventors: Sumit Tayal, Joseph A. Oberle, David C. Sastry, Anil Kumar Agarwal
  • Input voltage degradation detection
    Patent number: 12554434
    Abstract: A method includes performing a self-initiated test memory operation of a memory device in a memory sub-system and detecting, via a sensor circuit, an input voltage or input current of the memory device or the memory sub-system. The method further includes determining whether the input voltage or the input current meets a degradation criteria and generating a management control signal responsive based on the determination whether the input voltage or the input current meets the degradation criteria.
    Type: Grant
    Filed: December 15, 2023
    Date of Patent: February 17, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Sumit Tayal, Joseph A. Oberle, David C. Sastry, Anil Kumar Agarwal
  • INPUT VOLTAGE DEGRADATION DETECTION
    Publication number: 20240201891
    Abstract: A method includes performing a host-initiated test memory operation of a memory device in a memory sub-system and detecting, via a sensor circuit, an input voltage or input current of the memory device or the memory sub-system. The method further includes determining whether the input voltage or the input current meets a degradation criteria and generating a management control signal responsive based on the determination whether the input voltage or the input current meets the degradation criteria.
    Type: Application
    Filed: December 13, 2023
    Publication date: June 20, 2024
    Inventors: Joseph A. Oberle, David C. Sastry, Anil Kumar Agarwal, Sumit Tayal
  • INPUT VOLTAGE DEGRADATION DETECTION
    Publication number: 20240201893
    Abstract: A method includes performing a self-initiated test memory operation of a memory device in a memory sub-system and detecting, via a sensor circuit, an input voltage or input current of the memory device or the memory sub-system. The method further includes determining whether the input voltage or the input current meets a degradation criteria and generating a management control signal responsive based on the determination whether the input voltage or the input current meets the degradation criteria.
    Type: Application
    Filed: December 15, 2023
    Publication date: June 20, 2024
    Inventors: Sumit Tayal, Joseph A. Oberle, David C. Sastry, Anil Kumar Agarwal