Patents by Inventor Sumito Ootsuki

Sumito Ootsuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6699726
    Abstract: The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: March 2, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Hidaka, Sumito Ootsuki, Hiroshi Mochizuki, Hiroyuki Kanaya, Kumi Okuwada, Tomio Katata, Norihisa Arai, Hiroyuki Takenaka
  • Publication number: 20030134464
    Abstract: The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film.
    Type: Application
    Filed: January 3, 2003
    Publication date: July 17, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Osamu Hidaka, Sumito Ootsuki, Hiroshi Mochizuki, Hiroyuki Kanaya, Kumi Okuwada, Tomio Katata, Norihisa Arai, Hiroyuki Takenaka
  • Patent number: 6521927
    Abstract: The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: February 18, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Osamu Hidaka, Sumito Ootsuki, Hiroshi Mochizuki, Hiroyuki Kanaya, Kumi Okuwada, Tomio Katata, Norihisa Arai, Hiroyuki Takenaka
  • Publication number: 20020040988
    Abstract: The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film.
    Type: Application
    Filed: June 23, 1998
    Publication date: April 11, 2002
    Inventors: OSAMU HIDAKA, SUMITO OOTSUKI, HIROSHI MOCHIZUKI, HIROYUKI KANAYA, KUMI OKUWADA, TOMIO KATATA, NORIHISA ARAI, HIROYUKI TAKENAKA