Abstract: Systems and methods for frequency synthesis are disclosed. Exemplary embodiments of the digital frequency synthesizer can produce a fixed frequency and/or a modulated signal. An exemplary digital frequency synthesizer includes series-coupled delay cells, a linear feedback shift register, and an accumulator. The series-coupled delay cells generate, from an input clock signal, multiple clock edges corresponding to fractional clock periods. A linear feedback shift register selects clock edges to pass to a combinational logic circuit, based on a sign/enable control signal received from an accumulator and a clock signal received from the combinational logic circuit's output. The accumulator receives a control signal and controls the phase of the synthesizer output based upon the received control signal.