Patents by Inventor Sun Chen

Sun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250083404
    Abstract: The present application provides a processing method of a metal composite structure including a first metal layer and a second metal layer stacked on the first metal layer. The processing method includes the steps of defining a first through hole in the first metal layer, and drilling in the first through hole toward the second metal layer to form a traction hole in the second metal layer. Then, hot melt drilling is performed on a surface of the second metal layer away from the first metal layer toward the first through hole, thereby causing the second metal layer to crack under a traction force of the traction hole to form a second through hole, and a portion of the second metal layer to be melted and squeezed to form a bushing which adheres to at least a portion of a sidewall of the first through hole.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 13, 2025
    Inventors: Xin HUANG, Sheng-Hao HONG, Jian-Xiong QIAN, Lei ZHU, Peng XIE, Xiang-Kun MENG, Feng FANG, Hui WU, Xiao-Hui CHEN, Shuang-Xu ZHONG, Ren-Jun YANG, Chao CHENG, Zhi-Qiang SHEN, Ye-An SUN
  • Publication number: 20250089344
    Abstract: A thin film transistor and a preparation method thereof, a display panel, and a display device. The thin film transistor includes an active structure and a gate that are stacked and insulated by an interlayer insulating layer, the active structure includes a source region, a drain region, and a channel region, the source region and the drain region are located on two sides of the channel region, and in a thickness direction of the interlayer insulating layer, a projection of the gate overlaps with a projection of the channel region; wherein the channel region includes a metal oxide material, a ratio of a number of indium atoms and a number of zinc atoms in the channel region is a, and a?4.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 13, 2025
    Applicants: Yungu (Gu’an) Technology Co., Ltd., Hefei Visionox Technology Co., Ltd.
    Inventors: Xiaoqi SUN, Guowen YAN, Lidong DING, Fa-Hsyang CHEN, Lin XU, Dejian WANG
  • Publication number: 20250077804
    Abstract: A first circuit is configured to split a first integer value into a first coarse value and a first fine value, and split a second integer value into a second coarse value and a second fine value. A second circuit performs an analog multiply and accumulate (MAC) operation on the first and second coarse values to produce a first analog output, perform an analog MAC operation on the first coarse value and the second fine value to produce a second analog output, perform an analog MAC operation on the first fine value and the second coarse value to produce a third analog output, and perform an analog MAC operation on the first and second fine values together to produce a fourth analog output. A third circuit is configured to perform analog-to-digital (A/D) conversion on and combine the analog output signals to produce a reconstructed digital output signal.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 6, 2025
    Inventors: Ankur Agrawal, Andrea Fasoli, Monodeep Kar, Kyu-hyoun Kim, Sergey Rylov, Chia-Yu Chen, Xiao Sun
  • Publication number: 20250081538
    Abstract: The disclosure relates to the field of display technologies, and in particular, to a thin film transistor, a display panel, and a display apparatus. The thin film transistor includes: an active layer provided on a substrate. The active layer includes a first semiconductor layer, a first barrier layer, and a second semiconductor layer stacked in sequence. The first semiconductor layer is located on a side, away from the substrate, of the second semiconductor layer, and a mobility rate of the first semiconductor layer is less than a mobility rate of the second semiconductor layer. A double channel is formed by providing the first barrier layer provided between the first semiconductor layer and the second semiconductor layer, so as to make a threshold voltage Vth positive and improve the mobility rate of the thin film transistor, so that a greater processing Margin may be accommodated, thereby ensuring stability of a device.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Applicants: Hefei Visionox Technology Co., Ltd., Yungu (Gu’an) Technology Co., Ltd.
    Inventors: Guowen YAN, Dejian WANG, Xiaoqi SUN, Lin XU, Fa-Hsyang CHEN
  • Publication number: 20250069989
    Abstract: A semiconductor device includes a FEOL structure and a BEOL structure. The BEOL structure is formed over the FEOL structure and includes a conductive layer, an etching stop layer (ESL) structure, a through via and a barrier layer. The ESL structure is formed over the conductive layer and has a first recess and a lateral surface. The through via passes through the ESL structure to form the first recess and the lateral surface. The barrier layer covers the lateral surface and the first recess. The first recess is recessed with respect to the lateral surface, and the first recess has a first depth ranging between 1 nm and 7 nm.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Chih HUANG, Li-An SUN, Chih-Hao CHEN, Chung-Chuan HUANG
  • Publication number: 20250050318
    Abstract: The present invention relates to a rhodium-free TWC catalytic article, which comprises a catalyst composition coat on a substrate, wherein the catalyst composition coat comprises, —a first region comprising i). a top layer comprising a first platinum component and a first palladium component, each being present in supported form, and ii). a bottom layer comprising a second platinum component in supported form, and—optionally, a second region located downstream of the first region, and comprising iii). a top layer comprising a third platinum component in supported form, and iv). a bottom layer comprising a fourth platinum component in supported form. The present invention relates to an exhaust treatment system comprising the rhodium-free TWC catalytic article.
    Type: Application
    Filed: December 26, 2022
    Publication date: February 13, 2025
    Inventors: Chenghao SUN, Xiaoshuang YANG, Chengwei SONG, Shau Lin CHEN, Gianluca VOLANTE, Xiaolai ZHENG, Markus KINNE
  • Patent number: 12217158
    Abstract: An apparatus includes circuitry for a neural network that is configured to perform forward propagation neural network operations on floating point numbers having a first n-bit floating point format. The first n-bit floating point format has a configuration consisting of a sign bit, m exponent bits and p mantissa bits where m is greater than p. The circuitry is further configured to perform backward propagation neural network operations on floating point numbers having a second n-bit floating point format that is different than the first n-bit floating point format. The second n-bit floating point format has a configuration consisting of a sign bit, q exponent bits and r mantissa bits where q is greater than m and r is less than p.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: February 4, 2025
    Assignee: International Business Machines Corporation
    Inventors: Xiao Sun, Jungwook Choi, Naigang Wang, Chia-Yu Chen, Kailash Gopalakrishnan
  • Patent number: 11986575
    Abstract: A preparation method of drug-loaded micelles of an absorbable vascular stent coating for angiostenosis in an infant is provided, including the following steps: S1: dissolving a drug to be encapsulated in an appropriate amount of an emulsifying agent, adding a chitosan-poly(p-dioxohone) amphiphilic block copolymer (chitosan-b-PPDO copolymer), and thoroughly mixing to obtain a drug-copolymer solution; S2: adding the drug-copolymer solution obtained in S1 dropwise to an emulsifying agent aqueous solution prepared in advance, and continuously stirring to obtain a stable drug-loaded micellar solution; and S3: removing the emulsifying agent from the micellar solution obtained in S2 through vacuum evaporation, stirring a resulting concentrate, and centrifuging the concentrate to obtain a supernatant; and filtering the supernatant to obtain a filtrate, and subjecting the filtrate to dialysis to obtain the drug-loaded micelles.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: May 21, 2024
    Assignee: XINHUA HOSPITAL AFFILIATED TO SHANGHAI JIAOTONG UNIVERSITY SCHOOL OF MEDICINE
    Inventors: Kun Sun, Jing Sun, Sun Chen, Kai Bai, Yanan Lu, Lu Wang, Fujun Wang, Fan Zhao, Jihong Huang
  • Publication number: 20240042109
    Abstract: A preparation method of drug-loaded micelles of an absorbable vascular stent coating for angiostenosis in an infant is provided, including the following steps: Si: dissolving a drug to be encapsulated in an appropriate amount of an emulsifying agent, adding a chitosan-poly(p-dioxohone) amphiphilic block copolymer (chitosan-b-PPDO copolymer), and thoroughly mixing to obtain a drug-copolymer solution; S2: adding the drug-copolymer solution obtained in S1 dropwise to an emulsifying agent aqueous solution prepared in advance, and continuously stirring to obtain a stable drug-loaded micellar solution; and S3: removing the emulsifying agent from the micellar solution obtained in S2 through vacuum evaporation, stirring a resulting concentrate, and centrifuging the concentrate to obtain a supernatant; and filtering the supernatant to obtain a filtrate, and subjecting the filtrate to dialysis to obtain the drug-loaded micelles.
    Type: Application
    Filed: March 29, 2022
    Publication date: February 8, 2024
    Applicant: XINHUA HOSPITAL AFFILIATED TO SHANGHAI JIAOTONG UNIVERSITY SCHOOL OF MEDICINE
    Inventors: Kun SUN, Jing SUN, Sun CHEN, Kai BAI, Yanan LU, Lu WANG, Fujun WANG, Fan ZHAO, Jihong HUANG
  • Publication number: 20150319622
    Abstract: A system that identifies a number of secondary systems located in a first geographical area; identifies a primary resource available to be assigned to the secondary systems, the primary resource being a resource to which a primary system has a priority usage right; determines whether the number of secondary systems located in the first geographical area exceeds a predetermined threshold value; and limits a number of secondary systems to which the primary resource is assigned when it is determined that the number of secondary systems located in the first geographical area exceeds the predetermined threshold value.
    Type: Application
    Filed: December 26, 2013
    Publication date: November 5, 2015
    Applicant: Sony Corporation
    Inventor: SUN Chen
  • Patent number: 8932929
    Abstract: The invention relates to a thin film transistor memory and its fabricating method. This memory using the substrate as the gate electrode from bottom to up includes a charge blocking layer, a charge storage layer, a charge tunneling layer, an active region of the device and source/drain electrodes. The charge blocking layer is the ALD grown Al2O3 film. The charge storage layer is the two layer metal nanocrystals which include the first layer metal nanocrystals, the insulating layer and the second layer metal nanocrystals grown by ALD method in sequence from bottom to up. The charge tunneling layer is the symmetrical stack layer which includes the SiO2/HfO2/SiO2 or Al2O3/HfO2/Al2O3 film grown by ALD method in sequence from bottom to up. The active region of the device is the IGZO film grown by the RF sputtering method, and it is formed by the standard lithography and wet etch method.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: January 13, 2015
    Assignee: Fudan University
    Inventors: Shijin Ding, Sun Chen, Xingmei Cui, Pengfei Wang, Wei Zhang
  • Publication number: 20130264632
    Abstract: The invention relates to a thin film transistor memory and its fabricating method, This memory using the substrate as the gate electrode from bottom to up includes a charge blocking layer, a charge storage layer, a charge tunneling layer, an active region of the device and source/drain electrodes. The charge blocking layer is the ALD grown Al2O3 film. The charge storage layer is the two layer metal nanocrystals which include the first layer metal nanocrystals, the insulting layer and the second layer metal nanocrystals grown by ALD method. in sequence from bottom to up. The charge tunneling layer is the symmetrical stack layer which includes the SiO2/HfO2/SiO2 or Al2O3/HfO2/Al2O3 film grown. by ALD method in sequence from bottom to up. The active region of the device is the IGZO film grown by the RF sputtering method, and it is formed by the standard lithography and wet etch method.
    Type: Application
    Filed: April 24, 2012
    Publication date: October 10, 2013
    Applicant: Fudan University
    Inventors: Shijin Ding, Sun Chen, Xingmei Cui, Pengfei Wang, Wei Zhang
  • Patent number: 8093877
    Abstract: A transient voltage compensation apparatus and a power supply using the same are provided. The power supply mainly uses a compensation circuit coupled between an input terminal and an output terminal of a power converter. When a load of the power supply is switched in a very short time, a power coupled to the compensation circuit is retrieved to compensate the output of the power supply, such that the output voltage is kept steady, and the transient response of the power supply is increased.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: January 10, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Yun-Jiun You, Hsiang-Jui Hung, Chun-San Lin, Han-Hsun Chen, Sun-Chen Yang
  • Publication number: 20110318137
    Abstract: A drilling fastener utilizes at least two sides jointed to form a shank. A corner point is formed between any two sides for outwardly extending a rib therefrom. The rib includes a cutting section extended outwardly from the corner point about an arc contour, and a arc section whose two sides respectively connect to the cutting section and the side. A cutting tip is formed at a convergence of the cutting section and the arc section and located at which the largest outer diameter of the shank is defined. An accommodating room is defined between each arc section and the side. Thereby, the auxiliary cutting provided by the cutting tip allows the debris to be swiftly extruded via the accommodating room, thence preferably decreasing the driving torque and preventing the workpiece from being damaged. The fixing efficiency after screwing is further promoted.
    Type: Application
    Filed: July 8, 2010
    Publication date: December 29, 2011
    Applicant: ESSENCE METHOD REFINE CO., LTD.
    Inventor: JIN-SUN CHEN
  • Publication number: 20110141250
    Abstract: The invention discloses a stereo-image display device. The stereo-image display device includes a light source, a polarization beam splitter, two image modulators and an image projection lens set. The light source is used for generating a parallel beam. The polarization beam splitter is used for splitting the parallel beam into two polarization orthogonal beams. Each image modulator is used for generating one visualized optical signal according to one of the beams and reflecting the visualized optical signal to the polarization beam splitter. Two visualized optical signals are to combine to one beam by the polarization beam splitter, and are projected through the image projection lens set onto a screen.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Inventors: HUANG-TZUNG JAN, SUN-CHEN WANG, CHIH-PEI CHEN
  • Patent number: 7755598
    Abstract: The present invention provides an image processing method for a display device. The method includes: calculating an average brightness of an image; adjusting the average brightness to generate an adjusted average brightness; utilizing Brightness Preserving Bi-Histogram Equalization (BBHE) and the adjusted average brightness to process the image; and displaying the image.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: July 13, 2010
    Assignee: ASUSTeK Computer Inc.
    Inventors: Sun-Chen Yang, Yii-Lin Wu, Hsiang-Jui Hung
  • Publication number: 20100171474
    Abstract: A transient voltage compensation apparatus and a power supply using the same are provided. The power supply mainly uses a compensation circuit coupled between an input terminal and an output terminal of a power converter. When a load of the power supply is switched in a very short time, a power coupled to the compensation circuit is retrieved to compensate the output of the power supply, such that the output voltage is kept steady, and the transient response of the power supply is increased.
    Type: Application
    Filed: March 17, 2010
    Publication date: July 8, 2010
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Yun-Jiun You, Hsiang-Jui Hung, Chun-San Lin, Han-Hsun Chen, Sun-Chen Yang
  • Patent number: 7743438
    Abstract: An anchor structure for sensors of faucets is located in a sensing faucet. The sensor has a detection side and at least one notch on another side opposite to the detection side at an elevation same as an annular groove formed on an inner wall of a faucet body. An elastic clipping ring is provided to latch in the annular groove and the notch of the sensor to form a bucking effect to anchor the sensor at a selected location in the faucet. The elastic clipping ring is hollow and annular to provide a passage for watering piping and electric wiring. The structure is simpler and can be installed and removed rapidly.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: June 29, 2010
    Inventor: Jan-Sun Chen
  • Patent number: 7714559
    Abstract: A transient voltage compensation apparatus and a power supply using the same are provided. The power supply mainly uses an energy transferring circuit coupled between an input terminal and an output terminal of a power converter. When a load of the power supply is switched in a very short time, a power coupled to the energy transferring circuit is retrieved to compensate the output of the power supply, such that the output voltage is kept steady, and the transient response of the power supply is increased.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: May 11, 2010
    Assignee: ASUSTeK Computer Inc.
    Inventors: Yun-Jiun You, Hsiang-Jui Hung, Chun-San Lin, Han-Hsun Chen, Sun-Chen Yang
  • Patent number: D1061606
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: February 11, 2025
    Assignee: KDAN MOBILE SOFTWARE LTD.
    Inventors: Po-Chou Su, Hsuan Tu, Nan-Kuang Lee, Jia-Rou Lee, Weichih Sun, Kai-Yi Wu, Ying-Hsiu Chen