Abstract: The present invention relates to a signal synchronization adjustment method and a signal synchronization adjustment circuit, for applying to data reading according to a reference clock signal between a memory controller and a dynamic random access memory in an electronic device. First, the memory controller triggers a command signal to the dynamic random access memory; then, the dynamic random access memory delays for a column selection signal latency time according to a first rising edge of the reference clock signal, and then triggers a column selection signal; after that, the dynamic random access memory delays for an internal data strobe signal latency time, and then triggers an internal data strobe signal; finally, the dynamic random access memory delays for an external data strobe signal latency time, and then triggers an external data strobe signal. The signal synchronization adjustment circuit is applied to the signal synchronization adjustment method.

Abstract: A display device includes a first emission area, a second emission area disposed adjacent to the first emission area, and a non-emission area, a base member disposed in the first emission area, the second emission area, and the non-emission area, a light emitting element part disposed and including a first light emitting element disposed in the first emission area and a second light emitting element disposed in the second emission area, a wavelength conversion part disposed on the light emitting element part and including a first wavelength conversion pattern, a first insulating layer covering the first wavelength conversion pattern, opened at a portion disposed adjacent to the first emission area, exposing a portion of the first wavelength conversion pattern, and a light blocking member disposed in the non-emission area and covering the portion of the first wavelength conversion pattern. The wavelength conversion part is disposed in the second emission area.

Abstract: The present invention relates to a novel Lactobacillus paracasei NK112 strain that has the effect of preventing or treating cognitive dysfunction and intestinal dysfunction. In addition, the present invention relates to a composition for prevention, treatment, or alleviation of cognitive dysfunction and intestinal dysfunction, comprising a Lactobacillus paracasei NK112 strain, a Cuscuta australis R.Br. extract, and a Cuscuta japonica Choisy extract. The strain and the composition, of the present invention, exhibit efficacy in increasing the expression of brain-derived neurotrophic factor (BDNF) and nerve growth factor (NGF), alleviating intestinal inflammation, and the like, and thus can be effectively used in the prevention or treatment of cognitive dysfunction and intestinal dysfunction.

Abstract: A semiconductor integrated circuit is provided, including: a first switch circuit; a logic circuit, coupled to the first switch circuit, a first floating diffusion point being defined between the first switch circuit and the logic circuit; a second switch circuit, coupled to the logic circuit, a second floating diffusion point being defined between the second switch circuit and the logic circuit; and a voltage holding circuit, coupled to the first floating diffusion point and the second floating diffusion point, and used to adjust the voltages of the floating diffusion points. The voltage holding circuit increases or decreases the voltage values of the first floating diffusion point and the second floating diffusion point. Thereby, the influence of long recovery time on the semiconductor integrated circuit is improved, and the stability is ensured.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

Abstract: A multilayer electronic component includes a body comprising dielectric layers, and first and second internal electrode layers alternately stacked in a stacking direction with respective dielectric layers interposed therebetween. The first internal electrode layer includes first and second internal electrodes arranged with a first spacer interposed therebetween, and the second internal electrode layer includes third and fourth internal electrodes arranged with a second spacer interposed therebetween.

Abstract: A multilayer ceramic electronic component includes a ceramic body including a dielectric layer and a plurality of internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween; and an external electrode, wherein the ceramic body comprises an active portion including a plurality of internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween to form capacitance and a cover portion formed in upper and lower portions of the active portion, wherein a plurality of internal electrodes in the upper region and the lower region of the active portion is disposed inwardly of an outer side surface of the ceramic body to be spaced apart by a predetermined distance from the body portion, and the plurality of internal electrodes in the central region of the active portion and the internal electrodes having the same polarities are connected to each other via vias.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

Abstract: A multilayer electronic component includes a body comprising dielectric layers, and first and second internal electrode layers alternately stacked in a stacking direction with respective dielectric layers interposed therebetween. The first internal electrode layer includes first and second internal electrodes arranged with a first spacer interposed therebetween, and the second internal electrode layer includes third and fourth internal electrodes arranged with a second spacer interposed therebetween.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.

Abstract: A multi-layered ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed outside of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The first internal electrode is exposed from a first surface of the ceramic body and the second internal electrode is exposed from a second surface opposing the first surface. The first internal electrode has a notch portion disposed inwardly of a portion facing the first surface and, and the second internal electrode has a notch portion disposed inwardly of a portion facing the second surface. Each of the notch portions and a margin portion of the ceramic body in a second direction and in a third direction are provided with a step absorption layer, respectively.

Abstract: A multilayer electronic component includes a body comprising dielectric layers, and first and second internal electrode layers alternately stacked in a stacking direction with respective dielectric layers interposed therebetween. The first internal electrode layer includes first and second internal electrodes arranged with a first spacer interposed therebetween, and the second internal electrode layer includes third and fourth internal electrodes arranged with a second spacer interposed therebetween.

Abstract: A multilayer ceramic capacitor includes a ceramic body including a plurality of dielectric layers stacked therein in a stacking direction; first and second external electrodes disposed externally on the ceramic body; first and second internal electrodes alternately stacked with the plurality of dielectric layers, forming an internal active layer of the ceramic body, and respectively connected to the first and second external electrodes; a dummy layer, including a conductive material and having a mesh shape, disposed in at least one of an upper cover layer or a lower cover layer respectively disposed above or below the internal active layer of the ceramic body in the stacking direction.

Abstract: A multilayer electronic component includes a body comprising dielectric layers, and first and second internal electrode layers alternately stacked in a stacking direction with respective dielectric layers interposed therebetween. The first internal electrode layer includes first and second internal electrodes arranged with a first spacer interposed therebetween, and the second internal electrode layer includes third and fourth internal electrodes arranged with a second spacer interposed therebetween.

Abstract: A multilayer ceramic capacitor includes a body including a dielectric layer, and first and second internal electrodes configured to be layered in a third direction with the dielectric layer interposed therebetween and having first and second connection portions, respectively, and including first, second, third, fourth, fifth and sixth surfaces; a first external electrode disposed on the fifth surface of the body; and a second external electrode disposed on the fifth surface of the body. The first internal electrode is exposed to the third surface and the fifth surface of the body through the first connection portion, and the second internal electrode is exposed to the fourth surface and the fifth surface of the body through the second connection portion.

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes alternately exposed to first and second outer surfaces with the dielectric layer interposed therebetween; and first and second external electrodes disposed on the first and second outer surfaces of the ceramic body so as to be connected to the first and second internal electrodes, respectively. The first internal electrode has a plurality of first ends connected to the first external electrode and a first recessed region positioned between the plurality of first ends, the first recessed region at least partially filled with a dielectric material. The second internal electrode has a plurality of second ends connected to the second external electrode and a second recessed region positioned between the plurality of second ends, the second recessed region at least partially filled with the dielectric material.