Patents by Inventor Sun-Hwan Hwang

Sun-Hwan Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180290126
    Abstract: Disclosed are a catalyst for oxidative dehydrogenation and a method of preparing the same. More particularly, a catalyst for oxidative dehydrogenation of butene having a high butene conversion rate and superior side reaction inhibition effect and thus having high reactivity and high selectivity for a product by preparing metal oxide nanoparticles and then fixing the prepared metal oxide nanoparticles to a support, and a method of preparing the same are provided.
    Type: Application
    Filed: May 18, 2017
    Publication date: October 11, 2018
    Inventors: Seongmin KIM, Dong Hyun KO, Kyong Yong CHA, Dae Heung CHOI, Myung Ji SUH, Jun Kyu HAN, Sun Hwan HWANG, Jun Han KANG, Joo Hyuck LEE, Hyun Seok NAM, Ye Seul HWANG, Sang Jin HAN
  • Publication number: 20180214854
    Abstract: The present invention relates to a ferrite-based catalyst composite, a method of preparing the same, and a method of preparing butadiene using the same. More particularly, the present invention provides a ferrite-based catalyst composite having a shape that allows effective dispersion of excess heat generated in a butadiene production process and prevention of catalyst damage and side reaction occurrence by reducing direct exposure of a catalyst to heat, a method of preparing the ferrite-based catalyst composite, and a method of preparing butadiene capable of lowering the temperature of a hot spot and reducing generation of Cox by allowing active sites of a catalyst to have a broad temperature gradient (profile) during oxidative dehydrogenation using the ferrite-based catalyst composite, and thus, providing improved process efficiency.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 2, 2018
    Inventors: Dae Heung CHOI, Dong Hyun KO, Kyong Yong CHA, Myung Ji SUH, Ye Seul HWANG, Sun Hwan HWANG, Seong Min KIM, Jun Han KANG, Joo Hyuck LEE, Hyun Seok NAM, Sang Jin HAN, Jun Kyu HAN
  • Publication number: 20180207621
    Abstract: The present invention relates to a method of preparing a catalyst for oxidative dehydrogenation. More particularly, the present invention provides a method of preparing a catalyst for oxidative dehydrogenation providing superior selectivity and yield for a conjugated diene according to oxidative dehydrogenation by constantly maintaining pH of a coprecipitation solution using a drip-type double precipitation method to adjust an ?-iron oxide content in a catalyst in a predetermined range.
    Type: Application
    Filed: March 15, 2017
    Publication date: July 26, 2018
    Inventors: Jun Kyu HAN, Dong Hyun KO, Kyong Yong CHA, Myung Ji SUH, Sun Hwan HWANG, Seong Min KIM
  • Publication number: 20180186711
    Abstract: The present invention relates to a catalyst for coating a surface of a porous material and a method of treating the surface of the porous material. More particularly, when the catalyst for coating a surface of a porous material and the method of treating the surface of the porous material of the present invention are used for butadiene synthesis reaction under high gas space velocity and high pressure conditions, heat generation may be easily controlled and differential pressure may be effectively alleviated, thereby providing improved reactant conversion rate and product selectivity.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 5, 2018
    Inventors: Myung Ji SUH, Jun Han KANG, Dong Hyun KO, Seong Min KIM, Hyun Seok NAM, Joo Hyuck LEE, Kyong Yong CHA, Dae Heung CHOI, Sang Jin HAN, Jun Kyu HAN, Sun Hwan HWANG, Ye Seul HWANG
  • Patent number: 10008642
    Abstract: A semiconductor light emitting device may include a semiconductor light emitting diode (LED) chip, a light-transmitting film on the LED chip, and a light-transmitting bonding layer between the light-transmitting film and the semiconductor LED chip. At least one of the light-transmitting film and the light-transmitting bonding layer may include a wavelength conversion material configured to convert light emitted by the semiconductor LED chip into light having a wavelength different from a wavelength of the emitted light. The light-transmitting bonding layer may have a lateral inclined region extending to the lateral surface to form an inclined surface. The semiconductor light emitting device may further include a reflective packaging portion surrounding the light-transmitting bonding layer, covering the first surface such that an electrode of the LED chip is at least partially exposed. The reflective packaging portion may include a reflective material.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: June 26, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Wan Seo, Jin Ha Kim, Kwang Bok Woo, Dong Hoon Lee, Won Joon Lee, Sun Hwan Hwang
  • Publication number: 20180175042
    Abstract: A method for fabricating a semiconductor device includes: forming a transistor in a semiconductor substrate; forming a capacitor including a hydrogen-containing top electrode over the transistor; and performing an annealing process for hydrogen passivation after the capacitor is formed.
    Type: Application
    Filed: September 11, 2017
    Publication date: June 21, 2018
    Inventors: Il-Sik JANG, Ji-Hwan PARK, Mi-Ri LEE, Bong-Seok JEON, Yong-Soo JOUNG, Sun-Hwan HWANG
  • Publication number: 20180133698
    Abstract: The present invention relates to a method of preparing a catalyst for oxidative dehydrogenation. More particularly, the method of preparing a catalyst for oxidative dehydrogenation includes a first step of preparing an aqueous iron-metal precursor solution by dissolving a trivalent cation iron (Fe) precursor and a divalent cation metal (A) precursor in distilled water; a second step of obtaining a slurry of an iron-metal oxide by reacting the aqueous iron-metal precursor solution with ammonia water in a coprecipitation bath to form an iron-metal oxide (step b) and then filtering the iron-metal oxide; and a third step of heating the iron-metal oxide slurry. In accordance with the present invention, a metal oxide catalyst, as a catalyst for oxidative dehydrogenation, having a high spinel phase structure proportion may be economically prepared by a simple process.
    Type: Application
    Filed: March 7, 2017
    Publication date: May 17, 2018
    Inventors: Kyong Yong CHA, Myung Ji SUH, Dong Hyun KO, Dae Heung CHOI, Ye Seul HWANG, Jun Kyu HAN, Sun Hwan HWANG, Seong Min KIM
  • Patent number: 9878961
    Abstract: A nickel-M-alumina hybrid xerogel catalyst for preparing methane, wherein the metal M is at least one element selected from the group consisting of Fe, Co, Ni, Ce, La, Mo, Cs, Y, and Mg, a method for preparing the catalyst and a method for preparing methane using the catalyst are provided. The catalyst has strong resistance against a high-temperature sintering reaction and deposition of carbon species, and can effectively improve a conversion ratio of carbon monoxide and selectivity to methane.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: January 30, 2018
    Assignee: POSCO
    Inventors: Hyo Jun Lim, Chang Dae Byun, In Kyu Song, Dong Jun Koh, Sun Hwan Hwang, Jeong Gil Seo
  • Patent number: 9871045
    Abstract: A semiconductor device includes first conductive patterns adjacent to each other and isolated by a trench including first and second trenches, a second conductive pattern formed in the first trench, and an insulating pattern partially filling the second trench under the second conductive pattern and formed between the first conductive patterns and the second conductive pattern.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 16, 2018
    Assignee: HYNIX SEMICONDUCTOR INC.
    Inventors: Seung-Jin Yeom, Noh-Jung Kwak, Chang-Heon Park, Sun-Hwan Hwang
  • Publication number: 20170309793
    Abstract: A semiconductor light emitting device may include a semiconductor light emitting diode (LED) chip, a light-transmitting film on the LED chip, and a light-transmitting bonding layer between the light-transmitting film and the semiconductor LED chip. At least one of the light-transmitting film and the light-transmitting bonding layer may include a wavelength conversion material configured to convert light emitted by the semiconductor LED chip into light having a wavelength different from a wavelength of the emitted light. The light-transmitting bonding layer may have a lateral inclined region extending to the lateral surface to form an inclined surface. The semiconductor light emitting device may further include a reflective packaging portion surrounding the light-transmitting bonding layer, covering the first surface such that an electrode of the LED chip is at least partially exposed. The reflective packaging portion may include a reflective material.
    Type: Application
    Filed: November 30, 2016
    Publication date: October 26, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: JONG WAN SEO, Jin Ha KIM, Kwang Bok WOO, Dong Hoon LEE, Won Joon LEE, Sun Hwan HWANG
  • Publication number: 20130317127
    Abstract: A nickel-M-alumina hybrid xerogel catalyst for preparing methane, wherein the metal M is at least one element selected from the group consisting of Fe, Co, Ni, Ce, La, Mo, Cs, Y, and Mg, a method for preparing the catalyst and a method for preparing methane using the catalyst are provided. The catalyst has strong resistance against a high-temperature sintering reaction and deposition of carbon species, and can effectively improve a conversion ratio of carbon monoxide and selectivity to methane.
    Type: Application
    Filed: December 28, 2011
    Publication date: November 28, 2013
    Applicant: POSCO
    Inventors: Hyo Jun Lim, Chang Dae Byun, In Kyu Song, Dong Jun Koh, Sun Hwan Hwang, Jeong Gil Seo
  • Patent number: 8580678
    Abstract: A method for fabricating a semiconductor device includes forming first plugs over a substrate, forming contact holes that expose the first plugs, ion-implanting an anti-diffusion material into the first plugs, and forming second plugs filling the contact holes.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 12, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sun-Hwan Hwang
  • Patent number: 8399323
    Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: March 19, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki-Hong Lee, Moon-Sig Joo, Kwon Hong, Sun-Hwan Hwang
  • Publication number: 20130049209
    Abstract: A semiconductor device includes first conductive patterns adjacent to each other and isolated by a trench including first and second trenches, a second conductive pattern formed in the first trench, and an insulating pattern partially filling the second trench under the second conductive pattern and formed between the first conductive patterns and the second conductive pattern.
    Type: Application
    Filed: December 21, 2011
    Publication date: February 28, 2013
    Inventors: Seung-Jin YEOM, Noh-Jung Kwak, Chang-Heon Pakr, Sun-Hwan Hwang
  • Patent number: 8309448
    Abstract: Provided is a method for forming a buried word line in a semiconductor device. The method includes forming a trench by etching a pad layer and a substrate, forming a conductive layer to fill the trench, planarizing the conductive layer until the pad layer is exposed, performing an etch-back process on the planarized conductive layer, and performing an annealing process in an atmosphere of a nitride-based gas after at least one of the forming of the conductive layer, the planarizing of the conductive layer, and the performing of the etch-back process on the planarized conductive layer.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Sun-Hwan Hwang, Se-Aug Jang, Kee-Joon Oh, Soon-Young Park
  • Publication number: 20120108057
    Abstract: A method for fabricating a semiconductor device includes forming first plugs over a substrate, forming contact holes that expose the first plugs, ion-implanting an anti-diffusion material into the first plugs, and forming second plugs filling the contact holes.
    Type: Application
    Filed: September 23, 2011
    Publication date: May 3, 2012
    Inventor: Sun-Hwan HWANG
  • Publication number: 20120021574
    Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 26, 2012
    Inventors: Ki-Hong LEE, Moon-Sig Joo, Kwon Hong, Sun-Hwan Hwang
  • Patent number: 8048743
    Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: November 1, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ki-Hong Lee, Moon-Sig Joo, Kwon Hong, Sun-Hwan Hwang
  • Patent number: 7919373
    Abstract: A method for doping polysilicon improves a doping profile during plasma doping and includes forming a silicon layer using two separate operations. After forming a first silicon layer, thermal annealing is performed to crystallize the first silicon layer, such that the uniformity of a doping concentration according to the depth of a layer inside is improved during plasma doping. Additionally, a doping concentration at the interface between a polysilicon layer and a gate oxide layer is increased. A by-product deposition layer is reduced, which is formed on the surface of a polysilicon layer due to the increase of a doping concentration in a polysilicon layer. As a result, the dopant loss, which is caused by the removing and cleansing of an ion implantation barrier used during doping, is reduced.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: April 5, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jin-Ku Lee, Jae-Geun Oh, Sun-Hwan Hwang
  • Patent number: 7902628
    Abstract: The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: March 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae-Eun Lim, Sun-Hwan Hwang