Abstract: An organic light-emitting diode display is disclosed. In one aspect, the display includes a substrate, a scan line formed over the substrate and configured to provide a scan signal, and a data line crossing the scan line and configured to provide a data voltage. A driving voltage line crosses the scan line and is configured to provide a driving voltage. The display also includes a switching transistor electrically connected to the scan line and the data line and a driving transistor electrically connected to the switching transistor and including a driving gate electrode, a driving source electrode, and a driving drain electrode. The display further includes a storage capacitor including a first storage electrode formed over the driving transistor and the driving gate electrode as a second storage electrode. The second storage electrode overlaps the first storage electrode in the depth dimension and extends from the driving voltage line.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate and an active pattern formed over the substrate and including first to fourth regions. A gate insulation layer is formed over the active pattern and the substrate, and a first gate electrode is formed over the gate insulation layer and partially overlapping the active pattern. The first gate electrode, the first region and the second region define a first transistor. A second gate electrode is formed on the same layer as the first gate electrode. The second gate electrode, the third region and the fourth region define a second transistor, and the second gate electrode, the second region and the fourth region define a third transistor. A first insulating interlayer is formed over the first gate electrode, the second gate electrode, and the gate insulation layer.

Abstract: An organic light emitting display apparatus includes a base substrate, an active pattern disposed on the base substrate, a data line disposed on the base substrate, and a driving voltage line disposed on the base substrate. The active pattern includes a first transistor including a source area, a drain area and a channel. The active pattern also includes a first capacitor area and a second capacitor area. The data line extends in a first direction. The data line is overlapped with the first capacitor area. The driving voltage line extends in a second direction substantially perpendicular to the first direction. The driving voltage line is overlapped with the second capacitor area.

Abstract: An organic light emitting diode (OLED) display includes a display unit including a plurality of pixels connected to a plurality of data lines, a plurality of scan lines, a plurality of initializing control lines, and a plurality of light emission control lines, a scan driver to output scan signals to the scan lines and initializing signals to the initializing control lines, and a data driver to output data signals to respective ones of the data lines. A first pixel and a second pixel may be commonly connected to a scan line and a data line. The scan driver may output at least one first initializing signal and at least one second initializing signal to the first pixel and second pixel, respectively. The scan signals and the first and the second initializing signals may be activated at different points in time.

Abstract: In an organic light emitting display including a pixel, and a method of driving the same, the pixel includes an organic light emitting diode (OLED), a storage capacitor coupled between a first power supply and a first node, a first transistor for controlling a current that flows from the first power supply to a second power supply through the OLED in response to a voltage applied to the first node, a second transistor coupled between a data line and a first electrode of the first transistor and turned on when a control signal is supplied through a control line, a third transistor coupled between the first node and a second electrode of the first transistor and turned on when a scan signal is supplied through an nth (n is a natural number) scan line, and a fourth transistor coupled between an initializing power supply and the first node and turned on when the scan signal is supplied through an (n?1)th scan line.

Abstract: An organic light emitting diode display device having a demultiplexing structure is disclosed. One inventive aspect includes a display panel, a scan driver, a data driver, a plurality of demultiplexers and a timing controller. The timing controller includes first, second and third control signal lines. Each demultiplexer includes first, second and third switching elements, and a branch point formed between the control signal lines and the switching elements. The distance between the switching elements and the display panel is less than the distance between the control signal lines and the display panel.

Abstract: An organic light emitting diode (OLED) display includes a display unit including a plurality of pixels connected to a plurality of data lines, a plurality of scan lines, a plurality of initializing control lines, and a plurality of light emission control lines, a scan driver to output scan signals to the scan lines and initializing signals to the initializing control lines, and a data driver to output data signals to respective ones of the data lines. A first pixel and a second pixel may be commonly connected to a scan line and a data line. The scan driver may output at least one first initializing signal and at least one second initializing signal to the first pixel and second pixel, respectively. The scan signals and the first and the second initializing signals may be activated at different points in time.

Abstract: A TFT array panel and a manufacturing method thereof. The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: In an organic light emitting display including a pixel, and a method of driving the same, the pixel includes an organic light emitting diode (OLED), a storage capacitor coupled between a first power supply and a first node, a first transistor for controlling a current that flows from the first power supply to a second power supply through the OLED in response to a voltage applied to the first node, a second transistor coupled between a data line and a first electrode of the first transistor and turned on when a control signal is supplied through a control line, a third transistor coupled between the first node and a second electrode of the first transistor and turned on when a scan signal is supplied through an nth (n is a natural number) scan line, and a fourth transistor coupled between an initializing power supply and the first node and turned on when the scan signal is supplied through an (n-1)th scan line.

Abstract: A liquid crystal display (LCD) apparatus and a method of manufacturing the same include a seal line having two protrusions, one of the protrusions having a liquid crystal (LC) injection hole. Moreover, the LCD apparatus having the seal line constitutes a closed loop. The display apparatus and the manufacturing method thereof increase production yields because the number of apparatus substrates for the display apparatus obtained from a mother substrate is increased by minimizing a distance between two adjacent apparatus substrates on the mother substrate. The method of manufacturing an exemplary LCD apparatus includes a one drop filling method or a vacuum injection method.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A TFT array panel and a manufacturing method thereof. The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: A TFT array panel and a manufacturing method thereof, The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: An array substrate includes a gate line, a data line, a thin-film transistor (TFT), a pixel electrode, a first sensor line, a second sensor line and a sensor electrode part. The TFT is electrically connected to the gate and data lines. The pixel electrode is formed in a unit area defined by the gate and data lines. The pixel electrode is electrically connected to the TFT. The first sensor line is substantially parallel with the gate line. The second sensor line is substantially parallel with the data line. The sensor electrode part is formed in the unit area and electrically connected to the first and second sensor lines. The sensor electrode part is adjacent to the pixel electrode in a large axis direction of the unit area.

Abstract: A display substrate includes a pixel, first, second and third gate lines, and a source line. The pixel includes first, second and third unit pixels, each generating a different color. The first, second and third gate lines are electrically connected to respective ones of the first, second and third unit pixels. The source line is electrically connected to each of the first, second and third unit pixels. Each of the first, second and third unit pixels includes a common electrode and a respective pixel electrode. The common electrode is formed on a substrate. The pixel electrodes are disposed over the common electrode such that the pixel electrode face the common electrode. Each of the pixel electrodes has a plurality of openings therethrough. This arrangement results in a wider display viewing angle and a reduction in the required number of source driver chips.

Abstract: A TFT array panel and a manufacturing method thereof, The TFT array panel includes an insulation substrate, a plurality of gate lines, a plurality of first dummy wiring lines, a gate insulating layer, and a plurality of data lines. The insulation substrate has a display area for displaying an image and a peripheral area outside the display area. The plurality of gate lines are formed in the display area and in a portion of the peripheral area. The plurality of first dummy wiring lines are insulated from the gate lines and formed in the peripheral area. The gate insulating later is formed on the gate lines and the first dummy wiring lines, and has at least one contact hole exposing at least lateral end portions of the first dummy wiring lines.

Abstract: An array substrate includes a gate line, a data line, a thin-film transistor (TFT), a pixel electrode, a first sensor line, a second sensor line and a sensor electrode part. The TFT is electrically connected to the gate and data lines. The pixel electrode is formed in a unit area defined by the gate and data lines. The pixel electrode is electrically connected to the TFT. The first sensor line is substantially parallel with the gate line. The second sensor line is substantially parallel with the data line. The sensor electrode part is formed in the unit area and electrically connected to the first and second sensor lines. The sensor electrode part is adjacent to the pixel electrode in a large axis direction of the unit area.

Abstract: A display panel includes an array substrate, an opposite substrate facing the array substrate, and a liquid crystal layer interposed between the array and opposite substrates. The array substrate includes a gate wiring, a data wiring, a pixel section, a sensor wiring section, a sensor electrode section and a sensor pad section. The gate wiring is formed in a first direction. The data wiring is formed in a second direction crossing the first direction. The pixel section is electrically connected to the gate and data wirings. The sensor wiring section is spaced apart from the gate and data wirings. The sensor electrode section is electrically connected to the sensor wiring section. The sensor pad section applies a test voltage to the sensor wiring section in order to inspect a display panel defect. Therefore, a short defect, which is generated between the array substrate and the opposite substrate, may be easily inspected.

Abstract: A thin film transistor panel includes an insulating substrate including a display area and a peripheral area. A plurality of pixels is defined by a plurality of data lines that cross a plurality of gate lines. A pixel electrode is formed in each of the pixels. A plurality of dummy pixels is defined by a dummy data line that crosses the plurality of gate lines. A dummy pixel electrode is formed in each of the dummy pixels, and a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor. The thin film transistor display panel reduces or prevents a difference in brightness between pixels caused by a difference of coupling capacitance between the data line adjacent to the peripheral area and the other data lines.

Abstract: A liquid crystal display (LCD) apparatus and a method of manufacturing the same include a seal line having two protrusions, one of the protrusions having a liquid crystal (LC) injection hole. Moreover, the LCD apparatus having the seal line constitutes a closed loop. The display apparatus and the manufacturing method thereof increase production yields because the number of apparatus substrates for the display apparatus obtained from a mother substrate is increased by minimizing a distance between two adjacent apparatus substrates on the mother substrate. The method of manufacturing an exemplary LCD apparatus includes a one drop filling method or a vacuum injection method.