Abstract: Disclosed is a method for operating ferroelectric-based three-dimensional flash memory including a data storage pattern. According to one embodiment, a program operation method of three-dimensional flash memory may comprise the steps of: adjusting the value of a program voltage to be applied to a selected word line corresponding to a target memory cell that is the target of a program operation among word lines on the basis of the slope at which a voltage pulse increases in an incremental step pulse programming (ISPP) method; applying the adjusted value of the program voltage to the selected word line; applying a pass voltage to each of the non-selected word lines excluding the selected word line among the word lines; and performing a program operation on the target memory cell in response to the adjusted value of the program voltage being applied to the selected word line and the pass voltage being applied to each of the non-selected word lines.

Abstract: Provided are a three-dimensional semiconductor memory device, a method for manufacturing the same, a method for operating the same, and an electronic system including the same. The three-dimensional semiconductor memory device includes a substrate, a stack structure on the substrate, and vertical channel structures, which are provided in channel holes penetrating the stack structure, wherein each of the vertical channel structures includes a data storage pattern, a vertical channel pattern, a conductive pad, and a vertical semiconductor pattern, wherein the vertical channel pattern includes a first portion contacting the upper surface of the substrate and a second portion provided between the data storage pattern and the vertical semiconductor pattern, and wherein the vertical semiconductor pattern is spaced apart from the substrate with the first portion of the vertical channel pattern therebetween.

Abstract: A three-dimensional flash memory for improving leakage current and a substrate are disclosed. The three-dimensional flash memory comprises: a string extending in one direction on the substrate, wherein the string includes a channel layer extending in the one direction and a charge storage layer extending in the one direction so as to surround the channel layer; at least one selection line vertically connected to an upper end or a lower end of the string; and a plurality of word lines positioned above or below the at least one selection line and vertically connected to the string, wherein the channel layer is formed of an oxide semiconductor material.

Abstract: Disclosed are a three-dimensional flash memory, which reduces leakage current and supports a hole injection erase technique, and a method for manufacturing same. According to an embodiment, the three-dimensional flash memory comprises: a substrate; a channel layer extending in one direction on the substrate and having the shape of a hollow macaroni; and a P-type filer extending in the one direction while filling the inner space of the channel layer.

Abstract: Provided are a three-dimensional semiconductor memory device, a method for manufacturing the same, a method for operating the same, and an electronic system including the same. The three-dimensional semiconductor memory device includes a substrate, a stack structure on the substrate, and vertical channel structures, which are provided in channel holes penetrating the stack structure, wherein each of the vertical channel structures includes a data storage pattern, a vertical channel pattern, a conductive pad, and a vertical semiconductor pattern, wherein the vertical channel pattern includes a first portion contacting the upper surface of the substrate and a second portion provided between the data storage pattern and the vertical semiconductor pattern, and wherein the vertical semiconductor pattern is spaced apart from the substrate with the first portion of the vertical channel pattern therebetween.

Abstract: Provided are a three-dimensional semiconductor memory device, a method for manufacturing the same, a method for operating the same, and an electronic system including the same. The three-dimensional semiconductor memory device includes a substrate, a stack structure on the substrate, and vertical channel structures, which are provided in channel holes penetrating the stack structure, wherein each of the vertical channel structures includes a data storage pattern, a vertical channel pattern, a conductive pad, and a vertical semiconductor pattern, wherein the vertical channel pattern includes a first portion contacting the upper surface of the substrate and a second portion provided between the data storage pattern and the vertical semiconductor pattern, and wherein the vertical semiconductor pattern is spaced apart from the substrate with the first portion of the vertical channel pattern therebetween.

Abstract: Provided are a three-dimensional semiconductor memory device, a method for manufacturing the same, a method for operating the same, and an electronic system including the same. The three-dimensional semiconductor memory device includes a substrate, a stack structure on the substrate, and vertical channel structures, which are provided in channel holes penetrating the stack structure, wherein each of the vertical channel structures includes a data storage pattern, a vertical channel pattern, a conductive pad, and a vertical semiconductor pattern, wherein the vertical channel pattern includes a first portion contacting the upper surface of the substrate and a second portion provided between the data storage pattern and the vertical semiconductor pattern, and wherein the vertical semiconductor pattern is spaced apart from the substrate with the first portion of the vertical channel pattern therebetween.